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intel/rt: Use reloc constants for the resume SBT

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It's going to be attached to the end of the shader binary, not an
arbitrary table somewhere in memory.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8637>
This commit is contained in:
Jason Ekstrand
2021-01-21 15:16:30 -06:00
committed by Marge Bot
parent 705395344d
commit c92fd35848
4 changed files with 8 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/intel/compiler/brw_compiler.h
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@@ -679,6 +679,8 @@ enum brw_shader_reloc_id {
BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW,
BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH,
BRW_SHADER_RELOC_SHADER_START_OFFSET,
BRW_SHADER_RELOC_RESUME_SBT_ADDR_LOW,
BRW_SHADER_RELOC_RESUME_SBT_ADDR_HIGH,
};
enum brw_shader_reloc_type {

5
src/intel/compiler/brw_nir_lower_rt_intrinsics.c
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@@ -337,8 +337,9 @@ lower_rt_intrinsics_impl(nir_function_impl *impl,
break;
case nir_intrinsic_load_btd_resume_sbt_addr_intel:
/* The call stack handler is just the first in our resume SBT */
sysval = globals.resume_sbt_addr;
sysval = nir_pack_64_2x32_split(b,
nir_load_reloc_const_intel(b, BRW_SHADER_RELOC_RESUME_SBT_ADDR_LOW),
nir_load_reloc_const_intel(b, BRW_SHADER_RELOC_RESUME_SBT_ADDR_HIGH));
break;
case nir_intrinsic_load_leaf_procedural_intel:

10
src/intel/compiler/brw_nir_lower_shader_calls.c
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@@ -330,8 +330,7 @@ rewrite_instr_src_from_phi_builder(nir_src *src, void *_pbv_arr)
}
static void
spill_ssa_defs_and_lower_shader_calls(nir_shader *shader, uint32_t num_calls,
uint32_t first_resume_sbt_idx)
spill_ssa_defs_and_lower_shader_calls(nir_shader *shader, uint32_t num_calls)
{
/* TODO: If a SSA def is filled more than once, we probably want to just
* spill it at the LCM of the fill sites so we avoid unnecessary
@@ -508,8 +507,7 @@ spill_ssa_defs_and_lower_shader_calls(nir_shader *shader, uint32_t num_calls,
nir_intrinsic_instr *call = nir_instr_as_intrinsic(instr);
nir_ssa_def *resume_record_addr =
nir_iadd_imm(b, nir_load_btd_resume_sbt_addr_intel(b),
(first_resume_sbt_idx + call_idx) *
BRW_BTD_RESUME_SBT_STRIDE);
call_idx * BRW_BTD_RESUME_SBT_STRIDE);
/* By the time we get here, any remaining shader/function memory
* pointers have been lowered to SSA values.
*/
@@ -1206,7 +1204,6 @@ replace_resume_with_halt(nir_shader *shader, nir_instr *keep)
*/
bool
brw_nir_lower_shader_calls(nir_shader *shader,
uint32_t first_resume_sbt_idx,
nir_shader ***resume_shaders_out,
uint32_t *num_resume_shaders_out,
void *mem_ctx)
@@ -1241,8 +1238,7 @@ brw_nir_lower_shader_calls(nir_shader *shader,
NIR_PASS(progress, shader, nir_opt_cse);
}
NIR_PASS_V(shader, spill_ssa_defs_and_lower_shader_calls,
num_calls, first_resume_sbt_idx);
NIR_PASS_V(shader, spill_ssa_defs_and_lower_shader_calls, num_calls);
/* Make N copies of our shader */
nir_shader **resume_shaders = ralloc_array(mem_ctx, nir_shader *, num_calls);

1
src/intel/compiler/brw_nir_rt.h
View File

@@ -52,7 +52,6 @@ void brw_nir_lower_combined_intersection_any_hit(nir_shader *intersection,
void brw_nir_lower_shader_returns(nir_shader *shader);
bool brw_nir_lower_shader_calls(nir_shader *shader,
uint32_t first_resume_sbt_idx,
nir_shader ***resume_shaders_out,
uint32_t *num_resume_shaders_out,
void *mem_ctx);