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nir: Rename WORK_GROUP (and similar) to WORKGROUP

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Be consistent with other usages in Vulkan and SPIR-V, and the recently
added workgroup_size field.

Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
This commit is contained in:
Caio Marcelo de Oliveira Filho
2021-06-04 12:04:15 -07:00
committed by Marge Bot
parent a71a780598
commit c8a7bd0dc8
61 changed files with 176 additions and 176 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/intel/compiler/brw_fs_nir.cpp
View File

@@ -191,10 +191,10 @@ emit_system_values_block(nir_block *block, fs_visitor *v)
*reg = *v->emit_samplemaskin_setup();
break;
case nir_intrinsic_load_work_group_id:
case nir_intrinsic_load_workgroup_id:
assert(v->stage == MESA_SHADER_COMPUTE ||
v->stage == MESA_SHADER_KERNEL);
reg = &v->nir_system_values[SYSTEM_VALUE_WORK_GROUP_ID];
reg = &v->nir_system_values[SYSTEM_VALUE_WORKGROUP_ID];
if (reg->file == BAD_FILE)
*reg = *v->emit_cs_work_group_id_setup();
break;
@@ -3691,7 +3691,7 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld,
break;
case nir_intrinsic_load_local_invocation_id:
case nir_intrinsic_load_work_group_id: {
case nir_intrinsic_load_workgroup_id: {
gl_system_value sv = nir_system_value_from_intrinsic(instr->intrinsic);
fs_reg val = nir_system_values[sv];
assert(val.file != BAD_FILE);
@@ -3701,7 +3701,7 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld,
break;
}
case nir_intrinsic_load_num_work_groups: {
case nir_intrinsic_load_num_workgroups: {
assert(nir_dest_bit_size(instr->dest) == 32);
const unsigned surface =
cs_prog_data->binding_table.work_groups_start;

4
src/intel/compiler/brw_nir_lower_cs_intrinsics.c
View File

@@ -54,8 +54,8 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state,
nir_ssa_def *sysval;
switch (intrinsic->intrinsic) {
case nir_intrinsic_load_workgroup_size:
case nir_intrinsic_load_work_group_id:
case nir_intrinsic_load_num_work_groups:
case nir_intrinsic_load_workgroup_id:
case nir_intrinsic_load_num_workgroups:
/* Convert this to 32-bit if it's not */
if (intrinsic->dest.ssa.bit_size == 64) {
intrinsic->dest.ssa.bit_size = 32;

2
src/intel/compiler/brw_nir_rt.c
View File

@@ -438,7 +438,7 @@ brw_nir_create_raygen_trampoline(const struct brw_compiler *compiler,
nir_ssa_def *local_shift =
nir_u2u32(&b, load_trampoline_param(&b, local_group_size_log2, 3, 8));
nir_ssa_def *global_id = nir_load_work_group_id(&b, 32);
nir_ssa_def *global_id = nir_load_workgroup_id(&b, 32);
nir_ssa_def *simd_channel = nir_load_subgroup_invocation(&b);
nir_ssa_def *local_x =
nir_ubfe(&b, simd_channel, nir_imm_int(&b, 0),