From c8783001c7350960a63bff0dc93a4e744c22b911 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 28 Jul 2021 13:51:38 +1000 Subject: [PATCH] intel/fs: restrict max push length on older GPUs to a smaller amount Fixes crash in dEQP-GLES2.functional.uniform_api.random.79 Cc: mesa-stable Reviewed-by: Jason Ekstrand Part-of: --- src/intel/compiler/brw_fs.cpp | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 8499a35b2c5..02eff3bd445 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -2656,16 +2656,23 @@ fs_visitor::assign_constant_locations() /* Now that we know how many regular uniforms we'll push, reduce the * UBO push ranges so we don't exceed the 3DSTATE_CONSTANT limits. */ + /* For gen4/5: + * Only allow 16 registers (128 uniform components) as push constants. + * + * If changing this value, note the limitation about total_regs in + * brw_curbe.c/crocus_state.c + */ + const unsigned max_push_length = compiler->devinfo->ver < 6 ? 16 : 64; unsigned push_length = DIV_ROUND_UP(stage_prog_data->nr_params, 8); for (int i = 0; i < 4; i++) { struct brw_ubo_range *range = &prog_data->ubo_ranges[i]; - if (push_length + range->length > 64) - range->length = 64 - push_length; + if (push_length + range->length > max_push_length) + range->length = max_push_length - push_length; push_length += range->length; } - assert(push_length <= 64); + assert(push_length <= max_push_length); } bool