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radeonsi: reduce the supported compute grid size

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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
This commit is contained in:
Marek Olšák
2023-05-19 00:02:04 -04:00
parent ebb784f268
commit c5806422a5
1 changed files with 3 additions and 2 deletions
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5
src/gallium/drivers/radeonsi/si_get.c
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@@ -994,9 +994,10 @@ static int si_get_compute_param(struct pipe_screen *screen, enum pipe_shader_ir
case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
if (ret) {
uint64_t *grid_size = ret;
/* Use this size, so that internal counters don't overflow 64 bits. */
grid_size[0] = UINT32_MAX;
grid_size[1] = UINT32_MAX;
grid_size[2] = UINT32_MAX;
grid_size[1] = UINT16_MAX;
grid_size[2] = UINT16_MAX;
}
return 3 * sizeof(uint64_t);