radeonsi: prefetch VBO descriptors after the first VGT shader
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
@@ -448,27 +448,73 @@ static void cik_prefetch_shader_async(struct si_context *sctx,
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cik_prefetch_TC_L2_async(sctx, bo, 0, bo->width0);
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}
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static void cik_prefetch_VBO_descriptors(struct si_context *sctx)
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{
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cik_prefetch_TC_L2_async(sctx, &sctx->vertex_buffers.buffer->b.b,
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sctx->vertex_buffers.buffer_offset,
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sctx->vertex_elements->desc_list_byte_size);
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}
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void cik_emit_prefetch_L2(struct si_context *sctx)
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{
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/* Prefetch shaders and VBO descriptors to TC L2. */
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if (sctx->prefetch_L2_mask & SI_PREFETCH_LS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.ls);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_HS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.hs);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_ES)
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cik_prefetch_shader_async(sctx, sctx->queued.named.es);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_GS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.gs);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.vs);
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/* Vertex buffer descriptors are uploaded uncached, so prefetch
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* them right after the VS binary. */
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VBO_DESCRIPTORS) {
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cik_prefetch_TC_L2_async(sctx, &sctx->vertex_buffers.buffer->b.b,
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sctx->vertex_buffers.buffer_offset,
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sctx->vertex_elements->desc_list_byte_size);
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if (sctx->b.chip_class >= GFX9) {
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/* Choose the right spot for the VBO prefetch. */
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if (sctx->tes_shader.cso) {
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if (sctx->prefetch_L2_mask & SI_PREFETCH_HS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.hs);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VBO_DESCRIPTORS)
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cik_prefetch_VBO_descriptors(sctx);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_GS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.gs);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.vs);
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} else if (sctx->gs_shader.cso) {
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if (sctx->prefetch_L2_mask & SI_PREFETCH_GS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.gs);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VBO_DESCRIPTORS)
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cik_prefetch_VBO_descriptors(sctx);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.vs);
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} else {
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.vs);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VBO_DESCRIPTORS)
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cik_prefetch_VBO_descriptors(sctx);
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}
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} else {
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/* SI-CI-VI */
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/* Choose the right spot for the VBO prefetch. */
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if (sctx->tes_shader.cso) {
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if (sctx->prefetch_L2_mask & SI_PREFETCH_LS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.ls);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VBO_DESCRIPTORS)
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cik_prefetch_VBO_descriptors(sctx);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_HS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.hs);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_ES)
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cik_prefetch_shader_async(sctx, sctx->queued.named.es);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_GS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.gs);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.vs);
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} else if (sctx->gs_shader.cso) {
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if (sctx->prefetch_L2_mask & SI_PREFETCH_ES)
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cik_prefetch_shader_async(sctx, sctx->queued.named.es);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VBO_DESCRIPTORS)
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cik_prefetch_VBO_descriptors(sctx);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_GS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.gs);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.vs);
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} else {
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.vs);
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if (sctx->prefetch_L2_mask & SI_PREFETCH_VBO_DESCRIPTORS)
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cik_prefetch_VBO_descriptors(sctx);
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}
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}
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if (sctx->prefetch_L2_mask & SI_PREFETCH_PS)
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cik_prefetch_shader_async(sctx, sctx->queued.named.ps);
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