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anv/image: Rename hiz_surface to aux_surface

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This commit is contained in:
Jason Ekstrand
2016-10-24 19:31:36 -07:00
parent ccdf9af392
commit c3eb58664e
3 changed files with 18 additions and 17 deletions
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16
src/intel/vulkan/anv_image.c
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@@ -190,8 +190,8 @@ make_surface(const struct anv_device *dev,
anv_finishme("Test gen8 multisampled HiZ"); anv_finishme("Test gen8 multisampled HiZ");
} else { } else {
isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl, isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl,
&image->hiz_surface.isl); &image->aux_surface.isl);
add_surface(image, &image->hiz_surface); add_surface(image, &image->aux_surface);
} }
} }
@@ -302,16 +302,16 @@ VkResult anv_BindImageMemory(
/* The offset and size must be a multiple of 4K or else the /* The offset and size must be a multiple of 4K or else the
* anv_gem_mmap call below will return NULL. * anv_gem_mmap call below will return NULL.
*/ */
assert((image->offset + image->hiz_surface.offset) % 4096 == 0); assert((image->offset + image->aux_surface.offset) % 4096 == 0);
assert(image->hiz_surface.isl.size % 4096 == 0); assert(image->aux_surface.isl.size % 4096 == 0);
/* HiZ surfaces need to have their memory cleared to 0 before they /* HiZ surfaces need to have their memory cleared to 0 before they
* can be used. If we let it have garbage data, it can cause GPU * can be used. If we let it have garbage data, it can cause GPU
* hangs on some hardware. * hangs on some hardware.
*/ */
void *map = anv_gem_mmap(device, image->bo->gem_handle, void *map = anv_gem_mmap(device, image->bo->gem_handle,
image->offset + image->hiz_surface.offset, image->offset + image->aux_surface.offset,
image->hiz_surface.isl.size, image->aux_surface.isl.size,
device->info.has_llc ? 0 : I915_MMAP_WC); device->info.has_llc ? 0 : I915_MMAP_WC);
/* If anv_gem_mmap returns NULL, it's likely that the kernel was /* If anv_gem_mmap returns NULL, it's likely that the kernel was
@@ -320,9 +320,9 @@ VkResult anv_BindImageMemory(
if (map == NULL) if (map == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY); return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
memset(map, 0, image->hiz_surface.isl.size); memset(map, 0, image->aux_surface.isl.size);
anv_gem_munmap(map, image->hiz_surface.isl.size); anv_gem_munmap(map, image->aux_surface.isl.size);
} }
return VK_SUCCESS; return VK_SUCCESS;

9
src/intel/vulkan/anv_private.h
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@@ -1550,10 +1550,11 @@ struct anv_image {
struct { struct {
struct anv_surface depth_surface; struct anv_surface depth_surface;
struct anv_surface hiz_surface;
struct anv_surface stencil_surface; struct anv_surface stencil_surface;
}; };
}; };
struct anv_surface aux_surface;
}; };
static inline uint32_t static inline uint32_t
@@ -1614,11 +1615,11 @@ anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
static inline bool static inline bool
anv_image_has_hiz(const struct anv_image *image) anv_image_has_hiz(const struct anv_image *image)
{ {
/* We must check the aspect because anv_image::hiz_surface belongs to /* We must check the aspect because anv_image::aux_surface may be used for
* a union. * any type of auxiliary surface, not just HiZ.
*/ */
return (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) && return (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
image->hiz_surface.isl.size > 0; image->aux_surface.isl.size > 0;
} }
struct anv_buffer_view { struct anv_buffer_view {

10
src/intel/vulkan/genX_cmd_buffer.c
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@@ -1850,10 +1850,10 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer)
if (has_hiz) { if (has_hiz) {
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hdb) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hdb) {
hdb.HierarchicalDepthBufferObjectControlState = GENX(MOCS); hdb.HierarchicalDepthBufferObjectControlState = GENX(MOCS);
hdb.SurfacePitch = image->hiz_surface.isl.row_pitch - 1; hdb.SurfacePitch = image->aux_surface.isl.row_pitch - 1;
hdb.SurfaceBaseAddress = (struct anv_address) { hdb.SurfaceBaseAddress = (struct anv_address) {
.bo = image->bo, .bo = image->bo,
.offset = image->offset + image->hiz_surface.offset, .offset = image->offset + image->aux_surface.offset,
}; };
#if GEN_GEN >= 8 #if GEN_GEN >= 8
/* From the SKL PRM Vol2a: /* From the SKL PRM Vol2a:
@@ -1865,9 +1865,9 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer)
* - SURFTYPE_3D: distance in rows between R - slices * - SURFTYPE_3D: distance in rows between R - slices
*/ */
hdb.SurfaceQPitch = hdb.SurfaceQPitch =
image->hiz_surface.isl.dim == ISL_SURF_DIM_1D ? image->aux_surface.isl.dim == ISL_SURF_DIM_1D ?
isl_surf_get_array_pitch_el(&image->hiz_surface.isl) >> 2 : isl_surf_get_array_pitch_el(&image->aux_surface.isl) >> 2 :
isl_surf_get_array_pitch_el_rows(&image->hiz_surface.isl) >> 2; isl_surf_get_array_pitch_el_rows(&image->aux_surface.isl) >> 2;
#endif #endif
} }
} else { } else {