treewide: Stop lowering legacy atomics

There are no more producers of legacy atomics so these calls are inert.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>

src/amd/vulkan/radv_shader.c

@@ -741,10 +741,6 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_pipeline_
       radv_optimize_nir(nir, false);
    }
 
-   /* Temporary stopgap until legacy atomics are removed in the core */
-   NIR_PASS_V(nir, nir_lower_legacy_atomics);
-
-
    return nir;
 }
 

src/asahi/compiler/agx_compile.c

@@ -2380,7 +2380,6 @@ agx_preprocess_nir(nir_shader *nir, bool support_lod_bias)
    NIR_PASS_V(nir, nir_opt_sink, move_all);
    NIR_PASS_V(nir, nir_opt_move, move_all);
    NIR_PASS_V(nir, agx_nir_lower_ubo);
-   NIR_PASS_V(nir, nir_lower_legacy_atomics);
    NIR_PASS_V(nir, agx_nir_lower_shared_bitsize);
 }
 

src/broadcom/compiler/vir.c

@@ -617,9 +617,6 @@ type_size_vec4(const struct glsl_type *type, bool bindless)
 static void
 v3d_lower_nir(struct v3d_compile *c)
 {
-        /* FIXME: drop once GLSL/SPIR-V produce the new intrinsics. */
-        NIR_PASS(_, c->s, nir_lower_legacy_atomics);
-
         struct nir_lower_tex_options tex_options = {
                 .lower_txd = true,
                 .lower_tg4_broadcom_swizzle = true,

src/broadcom/vulkan/v3dv_pipeline.c

@@ -1708,9 +1708,6 @@ pipeline_lower_nir(struct v3dv_pipeline *pipeline,
    assert(pipeline->shared_data &&
           pipeline->shared_data->maps[p_stage->stage]);
 
-   /* Temporary stopgap until legacy atomics are removed in core */
-   NIR_PASS_V(p_stage->nir, nir_lower_legacy_atomics);
-
    NIR_PASS_V(p_stage->nir, nir_vk_lower_ycbcr_tex,
               lookup_ycbcr_conversion, layout);
 

src/freedreno/ir3/ir3_nir.c

@@ -381,9 +381,6 @@ ir3_finalize_nir(struct ir3_compiler *compiler, nir_shader *s)
 
    OPT_V(s, nir_remove_dead_variables, nir_var_function_temp, NULL);
 
-   /* Temporary stopgap until the core is transitioned to unified atomics */
-   OPT_V(s, nir_lower_legacy_atomics);
-
    if (ir3_shader_debug & IR3_DBG_DISASM) {
       mesa_logi("----------------------");
       nir_log_shaderi(s);

src/freedreno/vulkan/tu_shader.cc

@@ -1070,9 +1070,6 @@ tu_shader_create(struct tu_device *dev,
          nir->info.stage == MESA_SHADER_GEOMETRY)
       tu_gather_xfb_info(nir, &so_info);
 
-   /* Temporary stopgap until legacy atomics are removed */
-   NIR_PASS_V(nir, nir_lower_legacy_atomics);
-
    NIR_PASS_V(nir, tu_lower_io, dev, shader, layout);
 
    nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));

src/gallium/auxiliary/gallivm/lp_bld_nir.c

@@ -2668,7 +2668,6 @@ bool lp_build_nir_llvm(struct lp_build_nir_context *bld_base,
    nir_lower_locals_to_regs(nir);
    nir_remove_dead_derefs(nir);
    nir_remove_dead_variables(nir, nir_var_function_temp, NULL);
-   nir_lower_legacy_atomics(nir);
 
    if (is_aos(bld_base)) {
       nir_move_vec_src_uses_to_dest(nir);

src/gallium/auxiliary/nir/nir_to_tgsi.c

@@ -3856,8 +3856,6 @@ const void *nir_to_tgsi_options(struct nir_shader *s,
       source_mods |= nir_lower_fabs_source_mods;
    NIR_PASS_V(s, nir_lower_to_source_mods, source_mods);
 
-   NIR_PASS_V(s, nir_lower_legacy_atomics);
-
    NIR_PASS_V(s, nir_convert_from_ssa, true);
    NIR_PASS_V(s, nir_lower_vec_to_movs, ntt_vec_to_mov_writemask_cb, NULL);
 

src/gallium/drivers/r600/sfn/sfn_nir.cpp

@@ -782,7 +782,6 @@ r600_finalize_nir(pipe_screen *screen, void *shader)
    NIR_PASS_V(nir, r600_nir_lower_pack_unpack_2x16);
 
    NIR_PASS_V(nir, r600_lower_shared_io);
-   NIR_PASS_V(nir, nir_lower_legacy_atomics);
    NIR_PASS_V(nir, r600_nir_lower_atomics);
 
    if (rs->b.gfx_level == CAYMAN)

src/gallium/drivers/radeonsi/si_shader_nir.c

@@ -375,9 +375,6 @@ static void si_lower_nir(struct si_screen *sscreen, struct nir_shader *nir)
       si_late_optimize_16bit_samplers(sscreen, nir);
 
    NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_function_temp, NULL);
-
-   /* Temporary stopgap until legacy atomics are removed in the core */
-   NIR_PASS_V(nir, nir_lower_legacy_atomics);
 }
 
 static bool si_mark_divergent_texture_non_uniform(struct nir_shader *nir)

src/gallium/drivers/zink/zink_compiler.c

@@ -4874,9 +4874,6 @@ zink_shader_create(struct zink_screen *screen, struct nir_shader *nir,
    NIR_PASS_V(nir, nir_lower_fragcolor,
          nir->info.fs.color_is_dual_source ? 1 : 8);
 
-   /* Temporary stop gap until glsl-to-nir produces unified atomics */
-   NIR_PASS_V(nir, nir_lower_legacy_atomics);
-
    NIR_PASS_V(nir, lower_64bit_vertex_attribs);
    bool needs_size = analyze_io(ret, nir);
    NIR_PASS_V(nir, unbreak_bos, ret, needs_size);

src/gallium/frontends/lavapipe/lvp_pipeline.c

@@ -464,7 +464,6 @@ lvp_shader_lower(struct lvp_device *pdevice, nir_shader *nir, struct lvp_shader
    NIR_PASS_V(nir, nir_remove_dead_variables,
               nir_var_uniform | nir_var_image, NULL);
 
-   NIR_PASS_V(nir, nir_lower_legacy_atomics);
    scan_pipeline_info(shader, layout, nir);
 
    optimize(nir);

src/intel/compiler/brw_nir.c

@@ -932,8 +932,6 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
 
    OPT(nir_lower_frexp);
 
-   OPT(nir_lower_legacy_atomics);
-
    if (is_scalar) {
       OPT(nir_lower_alu_to_scalar, NULL, NULL);
    }

src/microsoft/compiler/dxil_nir.c

@@ -790,7 +790,7 @@ lower_shared_atomic(nir_builder *b, nir_intrinsic_instr *intr)
 bool
 dxil_nir_lower_atomics_to_dxil(nir_shader *nir)
 {
-   bool progress = nir_lower_legacy_atomics(nir);
+   bool progress = false;
 
    foreach_list_typed(nir_function, func, node, &nir->functions) {
       if (!func->is_entrypoint)

src/nouveau/codegen/nv50_ir_from_nir.cpp

@@ -3206,7 +3206,6 @@ Converter::run()
               type_size, (nir_lower_io_options)0);
 
    NIR_PASS_V(nir, nir_lower_subgroups, &subgroup_options);
-   NIR_PASS_V(nir, nir_lower_legacy_atomics);
 
    struct nir_lower_tex_options tex_options = {};
    tex_options.lower_txp = ~0;

src/panfrost/compiler/bifrost_compile.c

@@ -4436,7 +4436,6 @@ bi_optimize_nir(nir_shader *nir, unsigned gpu_id, bool is_blend)
       NIR_PASS(progress, nir, nir_opt_cse);
    }
 
-   NIR_PASS(progress, nir, nir_lower_legacy_atomics);
    NIR_PASS(progress, nir, nir_lower_load_const_to_scalar);
    NIR_PASS(progress, nir, nir_opt_dce);
 

src/panfrost/midgard/midgard_compile.c

@@ -395,8 +395,6 @@ midgard_preprocess_nir(nir_shader *nir, unsigned gpu_id)
    if (quirks & MIDGARD_BROKEN_LOD)
       NIR_PASS_V(nir, midgard_nir_lod_errata);
 
-   NIR_PASS_V(nir, nir_lower_legacy_atomics);
-
    /* Midgard image ops coordinates are 16-bit instead of 32-bit */
    NIR_PASS_V(nir, midgard_nir_lower_image_bitsize);
 

src/panfrost/vulkan/panvk_vX_shader.c

@@ -314,7 +314,6 @@ panvk_per_arch(shader_create)(struct panvk_device *dev, gl_shader_stage stage,
       .lower_invalid_implicit_lod = true,
    };
    NIR_PASS_V(nir, nir_lower_tex, &lower_tex_options);
-   NIR_PASS_V(nir, nir_lower_legacy_atomics);
 
    NIR_PASS_V(nir, panvk_per_arch(nir_lower_descriptors), dev, layout,
               &shader->has_img_access);