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use _mesa_num_inst_src_regs() and _mesa_opcode_string()

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This commit is contained in:
Brian Paul
2005-11-05 19:16:19 +00:00
parent b88fb724e6
commit c289f48342
1 changed files with 60 additions and 89 deletions
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149
src/mesa/tnl/t_vb_arbprogram.c
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@@ -47,13 +47,6 @@
#define DISASSEM 0 #define DISASSEM 0
/*--------------------------------------------------------------------------- */
struct opcode_info {
GLuint nr_args;
const char *string;
void (*print)( union instruction , const struct opcode_info * );
};
struct compilation { struct compilation {
GLuint reg_active; GLuint reg_active;
@@ -565,13 +558,13 @@ static void print_reg( GLuint file, GLuint reg )
} }
static void print_RSW( union instruction op, const struct opcode_info *info ) static void print_RSW( union instruction op )
{ {
GLuint swz = op.rsw.swz; GLuint swz = op.rsw.swz;
GLuint neg = op.rsw.neg; GLuint neg = op.rsw.neg;
GLuint i; GLuint i;
_mesa_printf("%s ", info->string); _mesa_printf("RSW ");
print_reg(0, op.rsw.dst); print_reg(0, op.rsw.dst);
_mesa_printf(", "); _mesa_printf(", ");
print_reg(op.rsw.file0, op.rsw.idx0); print_reg(op.rsw.file0, op.rsw.idx0);
@@ -586,22 +579,22 @@ static void print_RSW( union instruction op, const struct opcode_info *info )
} }
static void print_ALU( union instruction op, const struct opcode_info *info ) static void print_ALU( union instruction op )
{ {
_mesa_printf("%s ", info->string); _mesa_printf("%s ", _mesa_opcode_string(op.alu.opcode));
print_reg(0, op.alu.dst); print_reg(0, op.alu.dst);
_mesa_printf(", "); _mesa_printf(", ");
print_reg(op.alu.file0, op.alu.idx0); print_reg(op.alu.file0, op.alu.idx0);
if (info->nr_args > 1) { if (_mesa_num_inst_src_regs(op.alu.opcode) > 1) {
_mesa_printf(", "); _mesa_printf(", ");
print_reg(op.alu.file1, op.alu.idx1); print_reg(op.alu.file1, op.alu.idx1);
} }
_mesa_printf("\n"); _mesa_printf("\n");
} }
static void print_MSK( union instruction op, const struct opcode_info *info ) static void print_MSK( union instruction op )
{ {
_mesa_printf("%s ", info->string); _mesa_printf("MSK ");
print_reg(0, op.msk.dst); print_reg(0, op.msk.dst);
print_mask(op.msk.mask); print_mask(op.msk.mask);
_mesa_printf(", "); _mesa_printf(", ");
@@ -609,82 +602,60 @@ static void print_MSK( union instruction op, const struct opcode_info *info )
_mesa_printf("\n"); _mesa_printf("\n");
} }
static void print_NOP( union instruction op )
static void print_NOP( union instruction op, const struct opcode_info *info )
{ {
} }
static const struct opcode_info opcode_info[MAX_OPCODE + 3] = void
_tnl_disassem_vba_insn( union instruction op )
{ {
{ 1, "ABS", print_ALU }, switch (op.alu.opcode) {
{ 2, "ADD", print_ALU }, case OPCODE_ABS:
{ 1, "ARL", print_NOP }, case OPCODE_ADD:
{-1, "CMP", NULL }, case OPCODE_DP3:
{-1, "COS", NULL }, case OPCODE_DP4:
{-1, "DDX", NULL }, case OPCODE_DPH:
{-1, "DDY", NULL }, case OPCODE_DST:
{ 2, "DP3", print_ALU }, case OPCODE_EX2:
{ 2, "DP4", print_ALU }, case OPCODE_EXP:
{ 2, "DPH", print_ALU }, case OPCODE_FLR:
{ 2, "DST", print_ALU }, case OPCODE_FRC:
{ 0, "END", print_NOP }, case OPCODE_LG2:
{ 1, "EX2", print_ALU }, case OPCODE_LIT:
{ 1, "EXP", print_ALU }, case OPCODE_LOG:
{ 1, "FLR", print_ALU }, case OPCODE_MAX:
{ 1, "FRC", print_ALU }, case OPCODE_MIN:
{-1, "KIL", NULL }, case OPCODE_MOV:
{-1, "KIL_NV", NULL }, case OPCODE_MUL:
{ 1, "LG2", print_ALU }, case OPCODE_POW:
{ 1, "LIT", print_ALU }, case OPCODE_PRINT:
{ 1, "LOG", print_ALU }, case OPCODE_RCP:
{-1, "LRP", NULL }, case OPCODE_RSQ:
{ 3, "MAD", print_NOP }, case OPCODE_SGE:
{ 2, "MAX", print_ALU }, case OPCODE_SLT:
{ 2, "MIN", print_ALU }, case OPCODE_SUB:
{ 1, "MOV", print_ALU }, case OPCODE_XPD:
{ 2, "MUL", print_ALU }, print_ALU(op);
{-1, "PK2H", NULL }, break;
{-1, "PK2US", NULL }, case OPCODE_ARL:
{-1, "PK4B", NULL }, case OPCODE_END:
{-1, "PK4UB", NULL }, case OPCODE_MAD:
{ 2, "POW", print_ALU }, case OPCODE_RCC:
{ 1, "PRT", print_ALU }, /* PRINT */ case OPCODE_SWZ:
{ 1, "RCC", print_NOP }, print_NOP(op);
{ 1, "RCP", print_ALU }, break;
{-1, "RFL", NULL }, case RSW:
{ 1, "RSQ", print_ALU }, print_RSW(op);
{-1, "SCS", NULL }, break;
{-1, "SEQ", NULL }, case MSK:
{-1, "SFL", NULL }, print_MSK(op);
{ 2, "SGE", print_ALU }, break;
{-1, "SGT", NULL }, case REL:
{-1, "SIN", NULL }, print_ALU(op);
{-1, "SLE", NULL }, break;
{ 2, "SLT", print_ALU }, default:
{-1, "SNE", NULL }, _mesa_problem(NULL, "Bad opcode in _tnl_disassem_vba_insn()");
{-1, "STR", NULL }, }
{ 2, "SUB", print_ALU },
{ 1, "SWZ", print_NOP },
{-1, "TEX", NULL },
{-1, "TXB", NULL },
{-1, "TXD", NULL },
{-1, "TXP", NULL },
{-1, "TXP_NV", NULL },
{-1, "UP2H", NULL },
{-1, "UP2US", NULL },
{-1, "UP4B", NULL },
{-1, "UP4UB", NULL },
{-1, "X2d", NULL },
{ 2, "XPD", print_ALU },
{ 1, "RSW", print_RSW },
{ 2, "MSK", print_MSK },
{ 1, "REL", print_ALU },
};
void _tnl_disassem_vba_insn( union instruction op )
{
const struct opcode_info *info = &opcode_info[op.alu.opcode];
info->print( op, info );
} }
@@ -959,11 +930,10 @@ static struct reg cvp_emit_rsw( struct compilation *cp,
static void cvp_emit_inst( struct compilation *cp, static void cvp_emit_inst( struct compilation *cp,
const struct prog_instruction *inst ) const struct prog_instruction *inst )
{ {
const struct opcode_info *info = &opcode_info[inst->Opcode];
union instruction *op; union instruction *op;
union instruction fixup; union instruction fixup;
struct reg reg[3]; struct reg reg[3];
GLuint result, i; GLuint result, nr_args, i;
assert(sizeof(*op) == sizeof(GLuint)); assert(sizeof(*op) == sizeof(GLuint));
@@ -1070,7 +1040,8 @@ static void cvp_emit_inst( struct compilation *cp,
default: default:
result = cvp_choose_result( cp, &inst->DstReg, &fixup ); result = cvp_choose_result( cp, &inst->DstReg, &fixup );
for (i = 0; i < info->nr_args; i++) nr_args = _mesa_num_inst_src_regs(inst->Opcode);
for (i = 0; i < nr_args; i++)
reg[i] = cvp_emit_arg( cp, &inst->SrcReg[i], REG_ARG0 + i ); reg[i] = cvp_emit_arg( cp, &inst->SrcReg[i], REG_ARG0 + i );
op = cvp_next_instruction(cp); op = cvp_next_instruction(cp);