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intel/fs/gen12: Add codegen support for the SYNC instruction.

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Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Francisco Jerez
2019-09-03 17:51:17 -07:00
parent 0e57dbc55c
commit c22db5e188
4 changed files with 19 additions and 3 deletions
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2
src/intel/compiler/brw_eu.h
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@@ -1080,6 +1080,8 @@ void brw_NOP(struct brw_codegen *p);
void brw_WAIT(struct brw_codegen *p);
void brw_SYNC(struct brw_codegen *p, enum tgl_sync_function func);
/* Special case: there is never a destination, execution size will be
* taken from src0:
*/

8
src/intel/compiler/brw_eu_defines.h
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@@ -1004,6 +1004,14 @@ enum PACKED brw_width {
BRW_WIDTH_16 = 4,
};
enum tgl_sync_function {
TGL_SYNC_NOP = 0x0,
TGL_SYNC_ALLRD = 0x2,
TGL_SYNC_ALLWR = 0x3,
TGL_SYNC_BAR = 0xe,
TGL_SYNC_HOST = 0xf
};
/**
* Message target: Shared Function ID for where to SEND a message.
*

8
src/intel/compiler/brw_eu_emit.c
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@@ -1271,9 +1271,11 @@ void brw_NOP(struct brw_codegen *p)
brw_inst_set_opcode(p->devinfo, insn, BRW_OPCODE_NOP);
}
void brw_SYNC(struct brw_codegen *p, enum tgl_sync_function func)
{
brw_inst *insn = next_insn(p, BRW_OPCODE_SYNC);
brw_inst_set_cond_modifier(p->devinfo, insn, func);
}
/***********************************************************************
* Comparisons, if/else/endif

4
src/intel/compiler/brw_fs_generator.cpp
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@@ -1755,6 +1755,10 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
assert(inst->mlen <= BRW_MAX_MSG_LENGTH);
switch (inst->opcode) {
case BRW_OPCODE_SYNC:
assert(src[0].file == BRW_IMMEDIATE_VALUE);
brw_SYNC(p, tgl_sync_function(src[0].ud));
break;
case BRW_OPCODE_MOV:
brw_MOV(p, dst, src[0]);
break;