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intel: Rename GENx prefix in macros to GFXx in source files

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Commands used to do the changes:
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "GEN" -rIl src/intel/genxml | grep -E ".*py" |  xargs sed -ie "s/GEN\([%{]\)/GFX\1/g"
grep -E "[^_]GEN[[:digit:]]+" -rIl $SEARCH_PATH | grep -E ".*(\.c|\.h|\.y|\.l)" | xargs sed -ie "s/\([^_]\)GEN\([[:digit:]]\+\)/\1GFX\2/g"

Leave out renaming GFX12_CCS_E macros. They fall under renaming pattern like "_GEN[[:digit:]]+":
grep -E "GFX12_CCS_E" -rIl $SEARCH_PATH | xargs sed -ie "s/GFX12_CCS_E/GEN12_CCS_E/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
This commit is contained in:
Anuj Phogat
2021-03-29 15:16:59 -07:00
committed by Marge Bot
parent 0cfe7e3968
commit c1f3a778de
79 changed files with 1824 additions and 1824 deletions
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4
src/intel/vulkan/genX_pipeline.c
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@@ -289,7 +289,7 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
* 3DSTATE_SAMPLER_STATE_POINTER_VS command. Only one PIPE_CONTROL
* needs to be sent before any combination of VS associated 3DSTATE."
*/
anv_batch_emit(batch, GEN7_PIPE_CONTROL, pc) {
anv_batch_emit(batch, GFX7_PIPE_CONTROL, pc) {
pc.DepthStallEnable = true;
pc.PostSyncOperation = WriteImmediateData;
pc.Address = device->workaround_address;
@@ -705,7 +705,7 @@ emit_rs_state(struct anv_graphics_pipeline *pipeline,
raster.ScissorRectangleEnable = true;
#if GFX_VER >= 9
/* GEN9+ splits ViewportZClipTestEnable into near and far enable bits */
/* GFX9+ splits ViewportZClipTestEnable into near and far enable bits */
raster.ViewportZFarClipTestEnable = pipeline->depth_clip_enable;
raster.ViewportZNearClipTestEnable = pipeline->depth_clip_enable;
#elif GFX_VER >= 8