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panfrost/midgard: Set masks on ld_vary

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These masks distinguish scalar/vec2/vec3 loads from the default vec4,
which helps with assembly readability (since it's immediately obvious
how many components are _actually_ affected, rather than doing
mysterious things to an unknown number of unused components). Later in
the series, this will enable smarter register allocation, as the unused
components will not be interpreted abnormally.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
This commit is contained in:
Alyssa Rosenzweig
2019-05-22 02:44:12 +00:00
committed by Alyssa Rosenzweig
parent 550be763fa
commit c1715b558a
1 changed files with 3 additions and 1 deletions
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4
src/gallium/drivers/panfrost/midgard/midgard_compile.c
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@@ -1153,6 +1153,7 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
case nir_intrinsic_load_input:
offset = nir_intrinsic_base(instr);
unsigned nr_comp = nir_intrinsic_dest_components(instr);
bool direct = nir_src_is_const(instr->src[0]);
if (direct) {
@@ -1168,6 +1169,7 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
/* TODO: swizzle, mask */
midgard_instruction ins = m_ld_vary_32(reg, offset);
ins.load_store.mask = (1 << nr_comp) - 1;
midgard_varying_parameter p = {
.is_varying = 1,
@@ -1199,7 +1201,7 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
} else if (ctx->stage == MESA_SHADER_VERTEX) {
midgard_instruction ins = m_ld_attr_32(reg, offset);
ins.load_store.unknown = 0x1E1E; /* XXX: What is this? */
ins.load_store.mask = (1 << instr->num_components) - 1;
ins.load_store.mask = (1 << nr_comp) - 1;
emit_mir_instruction(ctx, ins);
} else {
DBG("Unknown load\n");