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nir: place aligned members after bitfields in shader_info.tess

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The placement of new shader_info.tess members unnecessarily wastes
space by interspersing 64bit members between bitfields.

Fixes: f1dd81ae10 ("nir: Collect if shader uses cross-invocation or indirect I/O.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4408>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4408>
This commit is contained in:
Mark Janes
2020-03-31 16:41:28 -07:00
committed by Marge Bot
parent 90a8b458ac
commit c07bbdbe82
1 changed files with 4 additions and 4 deletions
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8
src/compiler/shader_info.h
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@@ -330,6 +330,10 @@ typedef struct shader_info {
uint8_t tcs_vertices_out; uint8_t tcs_vertices_out;
enum gl_tess_spacing spacing:2; enum gl_tess_spacing spacing:2;
/** Is the vertex order counterclockwise? */
bool ccw:1;
bool point_mode:1;
/* Bit mask of TCS per-vertex inputs (VS outputs) that are used /* Bit mask of TCS per-vertex inputs (VS outputs) that are used
* with a vertex index that is NOT the invocation id * with a vertex index that is NOT the invocation id
*/ */
@@ -339,10 +343,6 @@ typedef struct shader_info {
* with a vertex index that is NOT the invocation id * with a vertex index that is NOT the invocation id
*/ */
uint64_t tcs_cross_invocation_outputs_read; uint64_t tcs_cross_invocation_outputs_read;
/** Is the vertex order counterclockwise? */
bool ccw:1;
bool point_mode:1;
} tess; } tess;
}; };
} shader_info; } shader_info;