nir: place aligned members after bitfields in shader_info.tess
The placement of new shader_info.tess members unnecessarily wastes
space by interspersing 64bit members between bitfields.
Fixes: f1dd81ae10
("nir: Collect if shader uses cross-invocation or indirect I/O.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4408>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4408>
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@@ -330,6 +330,10 @@ typedef struct shader_info {
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uint8_t tcs_vertices_out;
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enum gl_tess_spacing spacing:2;
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/** Is the vertex order counterclockwise? */
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bool ccw:1;
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bool point_mode:1;
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/* Bit mask of TCS per-vertex inputs (VS outputs) that are used
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* with a vertex index that is NOT the invocation id
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*/
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@@ -339,10 +343,6 @@ typedef struct shader_info {
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* with a vertex index that is NOT the invocation id
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*/
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uint64_t tcs_cross_invocation_outputs_read;
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/** Is the vertex order counterclockwise? */
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bool ccw:1;
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bool point_mode:1;
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} tess;
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};
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} shader_info;
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