spirv: Update SPIR-V grammar to use aliases
For enumerants and instruction names, instead of duplicating the values now the grammar will use an aliases field to list the alternative names. Update the Python scripts for that. The new SPIR-V files correspond to d92cf88c371424591115a87499009dfad41b669c ("Add "aliases" fields to the grammar and remove duplicated (#447)") in https://github.com/KhronosGroup/SPIRV-Headers. Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31369>
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@@ -152,13 +152,14 @@
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<ids type="opcode" start="6528" end="6591" vendor="Codeplay" comment="Contact duncan.brawley@codeplay.com"/>
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<ids type="opcode" start="6592" end="6655" vendor="Saarland University" comment="Contact devillers@cg.uni-saarland.de"/>
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<ids type="opcode" start="6656" end="6719" vendor="Meta" comment="Contact dunfanlu@meta.com"/>
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<ids type="opcode" start="6720" end="6783" vendor="MediaTek" comment="Contact samuel.huang@mediatek.com"/>
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<!-- Opcode enumerants to reserve for future use. To get a block, allocate
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multiples of 64 starting at the lowest available point in this
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block and add a corresponding <ids> tag immediately above. Make
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sure to fill in the vendor attribute, and preferably add a contact
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person/address in a comment attribute. -->
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<!-- Example new block: <ids type="opcode" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
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<ids type="opcode" start="6720" end="65535" comment="Opcode range reservable for future use by vendors"/>
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<ids type="opcode" start="6784" end="65535" comment="Opcode range reservable for future use by vendors"/>
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<!-- End reservations of opcodes -->
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@@ -185,13 +186,14 @@
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<ids type="enumerant" start="6528" end="6591" vendor="Codeplay" comment="Contact duncan.brawley@codeplay.com"/>
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<ids type="enumerant" start="6592" end="6655" vendor="Saarland University" comment="Contact devillers@cg.uni-saarland.de"/>
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<ids type="enumerant" start="6656" end="6719" vendor="Meta" comment="Contact dunfanlu@meta.com"/>
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<ids type="enumerant" start="6720" end="6783" vendor="MediaTek" comment="Contact samuel.huang@mediatek.com"/>
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<!-- Enumerants to reserve for future use. To get a block, allocate
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multiples of 64 starting at the lowest available point in this
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block and add a corresponding <ids> tag immediately above. Make
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sure to fill in the vendor attribute, and preferably add a contact
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person/address in a comment attribute. -->
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<!-- Example new block: <ids type="enumerant" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
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<ids type="enumerant" start="6720" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
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<ids type="enumerant" start="6784" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
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<!-- End reservations of enumerants -->
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File diff suppressed because it is too large
Load Diff
@@ -852,6 +852,7 @@ typedef enum SpvFunctionControlShift_ {
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SpvFunctionControlDontInlineShift = 1,
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SpvFunctionControlPureShift = 2,
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SpvFunctionControlConstShift = 3,
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SpvFunctionControlOptNoneEXTShift = 16,
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SpvFunctionControlOptNoneINTELShift = 16,
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SpvFunctionControlMax = 0x7fffffff,
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} SpvFunctionControlShift;
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@@ -862,6 +863,7 @@ typedef enum SpvFunctionControlMask_ {
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SpvFunctionControlDontInlineMask = 0x00000002,
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SpvFunctionControlPureMask = 0x00000004,
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SpvFunctionControlConstMask = 0x00000008,
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SpvFunctionControlOptNoneEXTMask = 0x00010000,
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SpvFunctionControlOptNoneINTELMask = 0x00010000,
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} SpvFunctionControlMask;
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@@ -1226,11 +1228,13 @@ typedef enum SpvCapability_ {
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SpvCapabilityAtomicFloat32AddEXT = 6033,
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SpvCapabilityAtomicFloat64AddEXT = 6034,
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SpvCapabilityLongCompositesINTEL = 6089,
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SpvCapabilityOptNoneEXT = 6094,
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SpvCapabilityOptNoneINTEL = 6094,
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SpvCapabilityAtomicFloat16AddEXT = 6095,
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SpvCapabilityDebugInfoModuleINTEL = 6114,
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SpvCapabilityBFloat16ConversionINTEL = 6115,
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SpvCapabilitySplitBarrierINTEL = 6141,
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SpvCapabilityArithmeticFenceEXT = 6144,
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SpvCapabilityFPGAClusterAttributesV2INTEL = 6150,
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SpvCapabilityFPGAKernelAttributesv2INTEL = 6161,
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SpvCapabilityFPMaxErrorINTEL = 6169,
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@@ -2170,6 +2174,7 @@ typedef enum SpvOp_ {
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SpvOpConvertBF16ToFINTEL = 6117,
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SpvOpControlBarrierArriveINTEL = 6142,
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SpvOpControlBarrierWaitINTEL = 6143,
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SpvOpArithmeticFenceEXT = 6145,
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SpvOpSubgroupBlockPrefetchINTEL = 6221,
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SpvOpGroupIMulKHR = 6401,
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SpvOpGroupFMulKHR = 6402,
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@@ -2916,6 +2921,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
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case SpvOpConvertBF16ToFINTEL: *hasResult = true; *hasResultType = true; break;
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case SpvOpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
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case SpvOpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
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case SpvOpArithmeticFenceEXT: *hasResult = true; *hasResultType = true; break;
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case SpvOpSubgroupBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
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case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
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case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
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@@ -3823,11 +3829,12 @@ inline const char* SpvCapabilityToString(SpvCapability value) {
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case SpvCapabilityAtomicFloat32AddEXT: return "AtomicFloat32AddEXT";
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case SpvCapabilityAtomicFloat64AddEXT: return "AtomicFloat64AddEXT";
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case SpvCapabilityLongCompositesINTEL: return "LongCompositesINTEL";
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case SpvCapabilityOptNoneINTEL: return "OptNoneINTEL";
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case SpvCapabilityOptNoneEXT: return "OptNoneEXT";
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case SpvCapabilityAtomicFloat16AddEXT: return "AtomicFloat16AddEXT";
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case SpvCapabilityDebugInfoModuleINTEL: return "DebugInfoModuleINTEL";
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case SpvCapabilityBFloat16ConversionINTEL: return "BFloat16ConversionINTEL";
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case SpvCapabilitySplitBarrierINTEL: return "SplitBarrierINTEL";
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case SpvCapabilityArithmeticFenceEXT: return "ArithmeticFenceEXT";
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case SpvCapabilityFPGAClusterAttributesV2INTEL: return "FPGAClusterAttributesV2INTEL";
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case SpvCapabilityFPGAKernelAttributesv2INTEL: return "FPGAKernelAttributesv2INTEL";
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case SpvCapabilityFPMaxErrorINTEL: return "FPMaxErrorINTEL";
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@@ -4713,6 +4720,7 @@ inline const char* SpvOpToString(SpvOp value) {
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case SpvOpConvertBF16ToFINTEL: return "OpConvertBF16ToFINTEL";
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case SpvOpControlBarrierArriveINTEL: return "OpControlBarrierArriveINTEL";
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case SpvOpControlBarrierWaitINTEL: return "OpControlBarrierWaitINTEL";
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case SpvOpArithmeticFenceEXT: return "OpArithmeticFenceEXT";
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case SpvOpSubgroupBlockPrefetchINTEL: return "OpSubgroupBlockPrefetchINTEL";
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case SpvOpGroupIMulKHR: return "OpGroupIMulKHR";
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case SpvOpGroupFMulKHR: return "OpGroupFMulKHR";
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@@ -36,12 +36,12 @@ def collect_data(spirv, kind):
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values = {}
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for x in operands["enumerants"]:
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name = x["enumerant"]
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val = x["value"]
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if val not in values:
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values[val] = [name]
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else:
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values[val].append(name)
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assert(val not in values)
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names = [x["enumerant"]]
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if "aliases" in x:
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names.extend(x["aliases"])
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values[val] = names
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return (kind, list(values.values()), operands["category"])
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@@ -49,15 +49,13 @@ def collect_opcodes(spirv):
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seen = set()
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values = []
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for x in spirv["instructions"]:
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# Handle aliases by choosing the first one in the grammar.
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# E.g. OpDecorateString and OpDecorateStringGOOGLE share same opcode.
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if x["opcode"] in seen:
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continue
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opcode = x["opcode"]
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assert(opcode not in seen)
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seen.add(opcode)
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name = x["opname"]
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assert name.startswith("Op")
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values.append([name[2:]])
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seen.add(opcode)
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return ("Op", values, None)
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@@ -31,16 +31,14 @@ from mako.template import Template
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def find_result_types(spirv):
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seen = set()
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for inst in spirv['instructions']:
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# Handle aliases by choosing the first one in the grammar.
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if inst['opcode'] in seen:
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continue
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seen.add(inst['opcode'])
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name = inst['opname']
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opcode = inst['opcode']
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assert(opcode not in seen)
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seen.add(opcode)
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if 'operands' not in inst:
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continue
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name = inst['opname']
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res_arg_idx = -1
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res_type_arg_idx = -1
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for idx, arg in enumerate(inst['operands']):
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