spirv: Update SPIR-V grammar to use aliases

For enumerants and instruction names, instead of duplicating the values
now the grammar will use an aliases field to list the alternative names.
Update the Python scripts for that.

The new SPIR-V files correspond to d92cf88c371424591115a87499009dfad41b669c
("Add "aliases" fields to the grammar and remove duplicated (#447)")
in https://github.com/KhronosGroup/SPIRV-Headers.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31369>
This commit is contained in:
Caio Oliveira
2024-09-25 09:01:08 -07:00
committed by Marge Bot
parent d43fec5da9
commit c06a55fd39
5 changed files with 162 additions and 780 deletions

View File

@@ -152,13 +152,14 @@
<ids type="opcode" start="6528" end="6591" vendor="Codeplay" comment="Contact duncan.brawley@codeplay.com"/>
<ids type="opcode" start="6592" end="6655" vendor="Saarland University" comment="Contact devillers@cg.uni-saarland.de"/>
<ids type="opcode" start="6656" end="6719" vendor="Meta" comment="Contact dunfanlu@meta.com"/>
<ids type="opcode" start="6720" end="6783" vendor="MediaTek" comment="Contact samuel.huang@mediatek.com"/>
<!-- Opcode enumerants to reserve for future use. To get a block, allocate
multiples of 64 starting at the lowest available point in this
block and add a corresponding <ids> tag immediately above. Make
sure to fill in the vendor attribute, and preferably add a contact
person/address in a comment attribute. -->
<!-- Example new block: <ids type="opcode" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
<ids type="opcode" start="6720" end="65535" comment="Opcode range reservable for future use by vendors"/>
<ids type="opcode" start="6784" end="65535" comment="Opcode range reservable for future use by vendors"/>
<!-- End reservations of opcodes -->
@@ -185,13 +186,14 @@
<ids type="enumerant" start="6528" end="6591" vendor="Codeplay" comment="Contact duncan.brawley@codeplay.com"/>
<ids type="enumerant" start="6592" end="6655" vendor="Saarland University" comment="Contact devillers@cg.uni-saarland.de"/>
<ids type="enumerant" start="6656" end="6719" vendor="Meta" comment="Contact dunfanlu@meta.com"/>
<ids type="enumerant" start="6720" end="6783" vendor="MediaTek" comment="Contact samuel.huang@mediatek.com"/>
<!-- Enumerants to reserve for future use. To get a block, allocate
multiples of 64 starting at the lowest available point in this
block and add a corresponding <ids> tag immediately above. Make
sure to fill in the vendor attribute, and preferably add a contact
person/address in a comment attribute. -->
<!-- Example new block: <ids type="enumerant" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
<ids type="enumerant" start="6720" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
<ids type="enumerant" start="6784" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
<!-- End reservations of enumerants -->

File diff suppressed because it is too large Load Diff

View File

@@ -852,6 +852,7 @@ typedef enum SpvFunctionControlShift_ {
SpvFunctionControlDontInlineShift = 1,
SpvFunctionControlPureShift = 2,
SpvFunctionControlConstShift = 3,
SpvFunctionControlOptNoneEXTShift = 16,
SpvFunctionControlOptNoneINTELShift = 16,
SpvFunctionControlMax = 0x7fffffff,
} SpvFunctionControlShift;
@@ -862,6 +863,7 @@ typedef enum SpvFunctionControlMask_ {
SpvFunctionControlDontInlineMask = 0x00000002,
SpvFunctionControlPureMask = 0x00000004,
SpvFunctionControlConstMask = 0x00000008,
SpvFunctionControlOptNoneEXTMask = 0x00010000,
SpvFunctionControlOptNoneINTELMask = 0x00010000,
} SpvFunctionControlMask;
@@ -1226,11 +1228,13 @@ typedef enum SpvCapability_ {
SpvCapabilityAtomicFloat32AddEXT = 6033,
SpvCapabilityAtomicFloat64AddEXT = 6034,
SpvCapabilityLongCompositesINTEL = 6089,
SpvCapabilityOptNoneEXT = 6094,
SpvCapabilityOptNoneINTEL = 6094,
SpvCapabilityAtomicFloat16AddEXT = 6095,
SpvCapabilityDebugInfoModuleINTEL = 6114,
SpvCapabilityBFloat16ConversionINTEL = 6115,
SpvCapabilitySplitBarrierINTEL = 6141,
SpvCapabilityArithmeticFenceEXT = 6144,
SpvCapabilityFPGAClusterAttributesV2INTEL = 6150,
SpvCapabilityFPGAKernelAttributesv2INTEL = 6161,
SpvCapabilityFPMaxErrorINTEL = 6169,
@@ -2170,6 +2174,7 @@ typedef enum SpvOp_ {
SpvOpConvertBF16ToFINTEL = 6117,
SpvOpControlBarrierArriveINTEL = 6142,
SpvOpControlBarrierWaitINTEL = 6143,
SpvOpArithmeticFenceEXT = 6145,
SpvOpSubgroupBlockPrefetchINTEL = 6221,
SpvOpGroupIMulKHR = 6401,
SpvOpGroupFMulKHR = 6402,
@@ -2916,6 +2921,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpConvertBF16ToFINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpArithmeticFenceEXT: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
@@ -3823,11 +3829,12 @@ inline const char* SpvCapabilityToString(SpvCapability value) {
case SpvCapabilityAtomicFloat32AddEXT: return "AtomicFloat32AddEXT";
case SpvCapabilityAtomicFloat64AddEXT: return "AtomicFloat64AddEXT";
case SpvCapabilityLongCompositesINTEL: return "LongCompositesINTEL";
case SpvCapabilityOptNoneINTEL: return "OptNoneINTEL";
case SpvCapabilityOptNoneEXT: return "OptNoneEXT";
case SpvCapabilityAtomicFloat16AddEXT: return "AtomicFloat16AddEXT";
case SpvCapabilityDebugInfoModuleINTEL: return "DebugInfoModuleINTEL";
case SpvCapabilityBFloat16ConversionINTEL: return "BFloat16ConversionINTEL";
case SpvCapabilitySplitBarrierINTEL: return "SplitBarrierINTEL";
case SpvCapabilityArithmeticFenceEXT: return "ArithmeticFenceEXT";
case SpvCapabilityFPGAClusterAttributesV2INTEL: return "FPGAClusterAttributesV2INTEL";
case SpvCapabilityFPGAKernelAttributesv2INTEL: return "FPGAKernelAttributesv2INTEL";
case SpvCapabilityFPMaxErrorINTEL: return "FPMaxErrorINTEL";
@@ -4713,6 +4720,7 @@ inline const char* SpvOpToString(SpvOp value) {
case SpvOpConvertBF16ToFINTEL: return "OpConvertBF16ToFINTEL";
case SpvOpControlBarrierArriveINTEL: return "OpControlBarrierArriveINTEL";
case SpvOpControlBarrierWaitINTEL: return "OpControlBarrierWaitINTEL";
case SpvOpArithmeticFenceEXT: return "OpArithmeticFenceEXT";
case SpvOpSubgroupBlockPrefetchINTEL: return "OpSubgroupBlockPrefetchINTEL";
case SpvOpGroupIMulKHR: return "OpGroupIMulKHR";
case SpvOpGroupFMulKHR: return "OpGroupFMulKHR";

View File

@@ -36,12 +36,12 @@ def collect_data(spirv, kind):
values = {}
for x in operands["enumerants"]:
name = x["enumerant"]
val = x["value"]
if val not in values:
values[val] = [name]
else:
values[val].append(name)
assert(val not in values)
names = [x["enumerant"]]
if "aliases" in x:
names.extend(x["aliases"])
values[val] = names
return (kind, list(values.values()), operands["category"])
@@ -49,15 +49,13 @@ def collect_opcodes(spirv):
seen = set()
values = []
for x in spirv["instructions"]:
# Handle aliases by choosing the first one in the grammar.
# E.g. OpDecorateString and OpDecorateStringGOOGLE share same opcode.
if x["opcode"] in seen:
continue
opcode = x["opcode"]
assert(opcode not in seen)
seen.add(opcode)
name = x["opname"]
assert name.startswith("Op")
values.append([name[2:]])
seen.add(opcode)
return ("Op", values, None)

View File

@@ -31,16 +31,14 @@ from mako.template import Template
def find_result_types(spirv):
seen = set()
for inst in spirv['instructions']:
# Handle aliases by choosing the first one in the grammar.
if inst['opcode'] in seen:
continue
seen.add(inst['opcode'])
name = inst['opname']
opcode = inst['opcode']
assert(opcode not in seen)
seen.add(opcode)
if 'operands' not in inst:
continue
name = inst['opname']
res_arg_idx = -1
res_type_arg_idx = -1
for idx, arg in enumerate(inst['operands']):