anv: Flip around the way we reason about storage image lowering
There are roughly two cases when it comes to storage images. In the easy case, we have full hardware support and we can just emit a typed read/write message in the shader and we're done. In the more complex cases, we may need to fall back to a typed read with a different format or even to a raw (SSBO) read. The hardware has always had basically full support for typed writes all the way back to Ivy Bridge but typed reads have been harder to come by. Starting with Skylake, we finally have enough that we at least have a format of the right bit size but not necessarily the right format so we can use a typed read but may still have to do an int->unorm or similar cast in the shader. Previously, in ANV, we treated lowered images as the default and write- only as a special case that we can optimize. This flips everything around and treats the cases where we don't need to do any lowering as the default "vanilla" case and treats the lowered case as special. Importantly, this means that read-write access to surfaces where the native format handles typed writes now use the same surface state as write-only access and the only thing that uses the lowered surface state is access read-write access with a format that doesn't support typed reads. This has the added benefit that now, if someone does a read without specifying a format, we can default to the vanilla surface and it will work as long as it's a format that supports typed reads. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13198>
This commit is contained in:
@@ -1360,10 +1360,10 @@ anv_descriptor_set_write_image_view(struct anv_device *device,
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assert(!(bind_layout->data & ANV_DESCRIPTOR_IMAGE_PARAM));
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assert(image_view->n_planes == 1);
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struct anv_storage_image_descriptor desc_data = {
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.read_write = anv_surface_state_to_handle(
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.vanilla = anv_surface_state_to_handle(
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image_view->planes[0].storage_surface_state.state),
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.write_only = anv_surface_state_to_handle(
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image_view->planes[0].writeonly_storage_surface_state.state),
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.lowered = anv_surface_state_to_handle(
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image_view->planes[0].lowered_storage_surface_state.state),
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};
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memcpy(desc_map, &desc_data, sizeof(desc_data));
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}
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@@ -1372,7 +1372,7 @@ anv_descriptor_set_write_image_view(struct anv_device *device,
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/* Storage images can only ever have one plane */
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assert(image_view->n_planes == 1);
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const struct brw_image_param *image_param =
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&image_view->planes[0].storage_image_param;
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&image_view->planes[0].lowered_storage_image_param;
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anv_descriptor_set_write_image_param(desc_map, image_param);
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}
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@@ -1437,17 +1437,17 @@ anv_descriptor_set_write_buffer_view(struct anv_device *device,
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if (bind_layout->data & ANV_DESCRIPTOR_STORAGE_IMAGE) {
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assert(!(bind_layout->data & ANV_DESCRIPTOR_IMAGE_PARAM));
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struct anv_storage_image_descriptor desc_data = {
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.read_write = anv_surface_state_to_handle(
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.vanilla = anv_surface_state_to_handle(
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buffer_view->storage_surface_state),
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.write_only = anv_surface_state_to_handle(
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buffer_view->writeonly_storage_surface_state),
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.lowered = anv_surface_state_to_handle(
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buffer_view->lowered_storage_surface_state),
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};
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memcpy(desc_map, &desc_data, sizeof(desc_data));
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}
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if (bind_layout->data & ANV_DESCRIPTOR_IMAGE_PARAM) {
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anv_descriptor_set_write_image_param(desc_map,
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&buffer_view->storage_image_param);
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&buffer_view->lowered_storage_image_param);
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}
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}
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@@ -2387,7 +2387,7 @@ anv_image_fill_surface_state(struct anv_device *device,
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anv_image_address(image, &surface->memory_range);
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if (view_usage == ISL_SURF_USAGE_STORAGE_BIT &&
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!(flags & ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY) &&
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(flags & ANV_IMAGE_VIEW_STATE_STORAGE_LOWERED) &&
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!isl_has_matching_typed_storage_image_format(&device->info,
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view.format)) {
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/* In this case, we are a writeable storage buffer which needs to be
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@@ -2407,7 +2407,7 @@ anv_image_fill_surface_state(struct anv_device *device,
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state_inout->clear_address = ANV_NULL_ADDRESS;
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} else {
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if (view_usage == ISL_SURF_USAGE_STORAGE_BIT &&
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!(flags & ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY)) {
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(flags & ANV_IMAGE_VIEW_STATE_STORAGE_LOWERED)) {
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/* Typed surface reads support a very limited subset of the shader
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* image formats. Translate it into the closest format the hardware
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* supports.
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@@ -2628,37 +2628,38 @@ anv_CreateImageView(VkDevice _device,
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/* NOTE: This one needs to go last since it may stomp isl_view.format */
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if (iview->vk.usage & VK_IMAGE_USAGE_STORAGE_BIT) {
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iview->planes[vplane].storage_surface_state.state = alloc_surface_state(device);
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anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
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&iview->planes[vplane].isl,
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ISL_SURF_USAGE_STORAGE_BIT,
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ISL_AUX_USAGE_NONE, NULL,
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0,
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&iview->planes[vplane].storage_surface_state,
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NULL);
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if (isl_is_storage_image_format(format.isl_format)) {
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iview->planes[vplane].storage_surface_state.state =
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iview->planes[vplane].lowered_storage_surface_state.state =
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alloc_surface_state(device);
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anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
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&iview->planes[vplane].isl,
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ISL_SURF_USAGE_STORAGE_BIT,
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ISL_AUX_USAGE_NONE, NULL,
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0,
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&iview->planes[vplane].storage_surface_state,
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&iview->planes[vplane].storage_image_param);
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ANV_IMAGE_VIEW_STATE_STORAGE_LOWERED,
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&iview->planes[vplane].lowered_storage_surface_state,
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&iview->planes[vplane].lowered_storage_image_param);
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} else {
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/* In this case, we support the format but, because there's no
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* SPIR-V format specifier corresponding to it, we only support
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* NonReadable (writeonly in GLSL) access. Instead of hanging in
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* these invalid cases, we give them a NULL descriptor.
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* SPIR-V format specifier corresponding to it, we only support it
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* if the hardware can do it natively. This is possible for some
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* reads but for most writes. Instead of hanging if someone gets
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* it wrong, we give them a NULL descriptor.
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*/
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assert(isl_format_supports_typed_writes(&device->info,
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format.isl_format));
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iview->planes[vplane].storage_surface_state.state =
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device->null_surface_state;
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}
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iview->planes[vplane].writeonly_storage_surface_state.state = alloc_surface_state(device);
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anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
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&iview->planes[vplane].isl,
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ISL_SURF_USAGE_STORAGE_BIT,
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ISL_AUX_USAGE_NONE, NULL,
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ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY,
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&iview->planes[vplane].writeonly_storage_surface_state,
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NULL);
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}
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}
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@@ -2697,9 +2698,9 @@ anv_DestroyImageView(VkDevice _device, VkImageView _iview,
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iview->planes[plane].storage_surface_state.state);
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}
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if (iview->planes[plane].writeonly_storage_surface_state.state.offset) {
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if (iview->planes[plane].lowered_storage_surface_state.state.offset) {
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anv_state_pool_free(&device->surface_state_pool,
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iview->planes[plane].writeonly_storage_surface_state.state);
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iview->planes[plane].lowered_storage_surface_state.state);
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}
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}
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@@ -2746,32 +2747,31 @@ anv_CreateBufferView(VkDevice _device,
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if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) {
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view->storage_surface_state = alloc_surface_state(device);
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view->writeonly_storage_surface_state = alloc_surface_state(device);
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view->lowered_storage_surface_state = alloc_surface_state(device);
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enum isl_format storage_format =
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anv_fill_buffer_surface_state(device, view->storage_surface_state,
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view->format, ISL_SURF_USAGE_STORAGE_BIT,
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view->address, view->range,
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isl_format_get_layout(view->format)->bpb / 8);
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enum isl_format lowered_format =
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isl_has_matching_typed_storage_image_format(&device->info,
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view->format) ?
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isl_lower_storage_image_format(&device->info, view->format) :
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ISL_FORMAT_RAW;
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anv_fill_buffer_surface_state(device, view->storage_surface_state,
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storage_format, ISL_SURF_USAGE_STORAGE_BIT,
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anv_fill_buffer_surface_state(device, view->lowered_storage_surface_state,
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lowered_format, ISL_SURF_USAGE_STORAGE_BIT,
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view->address, view->range,
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(storage_format == ISL_FORMAT_RAW ? 1 :
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isl_format_get_layout(storage_format)->bpb / 8));
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/* Write-only accesses should use the original format. */
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anv_fill_buffer_surface_state(device, view->writeonly_storage_surface_state,
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view->format, ISL_SURF_USAGE_STORAGE_BIT,
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view->address, view->range,
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isl_format_get_layout(view->format)->bpb / 8);
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(lowered_format == ISL_FORMAT_RAW ? 1 :
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isl_format_get_layout(lowered_format)->bpb / 8));
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isl_buffer_fill_image_param(&device->isl_dev,
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&view->storage_image_param,
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&view->lowered_storage_image_param,
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view->format, view->range);
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} else {
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view->storage_surface_state = (struct anv_state){ 0 };
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view->writeonly_storage_surface_state = (struct anv_state){ 0 };
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view->lowered_storage_surface_state = (struct anv_state){ 0 };
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}
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*pView = anv_buffer_view_to_handle(view);
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@@ -2797,9 +2797,9 @@ anv_DestroyBufferView(VkDevice _device, VkBufferView bufferView,
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anv_state_pool_free(&device->surface_state_pool,
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view->storage_surface_state);
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if (view->writeonly_storage_surface_state.alloc_size > 0)
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if (view->lowered_storage_surface_state.alloc_size > 0)
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anv_state_pool_free(&device->surface_state_pool,
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view->writeonly_storage_surface_state);
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view->lowered_storage_surface_state);
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vk_object_free(&device->vk, pAllocator, view);
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}
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@@ -1003,6 +1003,13 @@ lower_get_ssbo_size(nir_builder *b, nir_intrinsic_instr *intrin,
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return true;
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}
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static bool
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image_binding_needs_lowered_surface(nir_variable *var)
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{
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return !(var->data.access & ACCESS_NON_READABLE) &&
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var->data.image.format != PIPE_FORMAT_NONE;
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}
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static bool
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lower_image_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
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struct apply_pipeline_layout_state *state)
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@@ -1031,11 +1038,11 @@ lower_image_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, desc);
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} else if (binding_offset > MAX_BINDING_TABLE_SIZE) {
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const bool write_only =
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(var->data.access & ACCESS_NON_READABLE) != 0;
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const unsigned desc_comp =
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image_binding_needs_lowered_surface(var) ? 1 : 0;
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nir_ssa_def *desc =
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build_load_var_deref_descriptor_mem(b, deref, 0, 2, 32, state);
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nir_ssa_def *handle = nir_channel(b, desc, write_only ? 1 : 0);
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nir_ssa_def *handle = nir_channel(b, desc, desc_comp);
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nir_rewrite_image_intrinsic(intrin, handle, true);
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} else {
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unsigned array_size =
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@@ -1609,9 +1616,8 @@ anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice,
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dim == GLSL_SAMPLER_DIM_SUBPASS_MS)
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pipe_binding[i].input_attachment_index = var->data.index + i;
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/* NOTE: This is a uint8_t so we really do need to != 0 here */
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pipe_binding[i].write_only =
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(var->data.access & ACCESS_NON_READABLE) != 0;
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pipe_binding[i].lowered_storage_surface =
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image_binding_needs_lowered_surface(var);
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}
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}
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@@ -1825,8 +1825,8 @@ struct anv_storage_image_descriptor {
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* These are expected to already be shifted such that the 20-bit
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* SURFACE_STATE table index is in the top 20 bits.
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*/
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uint32_t read_write;
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uint32_t write_only;
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uint32_t vanilla;
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uint32_t lowered;
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};
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/** Struct representing a address/range descriptor
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@@ -2027,9 +2027,9 @@ struct anv_buffer_view {
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struct anv_state surface_state;
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struct anv_state storage_surface_state;
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struct anv_state writeonly_storage_surface_state;
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struct anv_state lowered_storage_surface_state;
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struct brw_image_param storage_image_param;
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struct brw_image_param lowered_storage_image_param;
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};
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struct anv_push_descriptor_set {
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@@ -2226,8 +2226,8 @@ struct anv_pipeline_binding {
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uint8_t dynamic_offset_index;
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};
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/** For a storage image, whether it is write-only */
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uint8_t write_only;
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/** For a storage image, whether it requires a lowered surface */
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uint8_t lowered_storage_surface;
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/** Pad to 64 bits so that there are no holes and we can safely memcmp
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* assuming POD zero-initialization.
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@@ -4345,18 +4345,20 @@ struct anv_image_view {
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/**
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* RENDER_SURFACE_STATE when using image as a storage image. Separate
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* states for write-only and readable, using the real format for
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* write-only and the lowered format for readable.
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* states for vanilla (with the original format) and one which has been
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* lowered to a format suitable for reading. This may be a raw surface
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* in extreme cases or simply a surface with a different format where we
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* expect some conversion to be done in the shader.
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*/
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struct anv_surface_state storage_surface_state;
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struct anv_surface_state writeonly_storage_surface_state;
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struct anv_surface_state lowered_storage_surface_state;
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struct brw_image_param storage_image_param;
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struct brw_image_param lowered_storage_image_param;
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} planes[3];
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};
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enum anv_image_view_state_flags {
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ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY = (1 << 0),
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ANV_IMAGE_VIEW_STATE_STORAGE_LOWERED = (1 << 0),
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ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL = (1 << 1),
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};
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@@ -2762,8 +2762,9 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
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case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: {
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if (desc->image_view) {
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struct anv_surface_state sstate = (binding->write_only)
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? desc->image_view->planes[binding->plane].writeonly_storage_surface_state
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struct anv_surface_state sstate =
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binding->lowered_storage_surface
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? desc->image_view->planes[binding->plane].lowered_storage_surface_state
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: desc->image_view->planes[binding->plane].storage_surface_state;
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surface_state = sstate.state;
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assert(surface_state.alloc_size);
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@@ -2846,8 +2847,8 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
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case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
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if (desc->buffer_view) {
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surface_state = (binding->write_only)
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? desc->buffer_view->writeonly_storage_surface_state
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surface_state = binding->lowered_storage_surface
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? desc->buffer_view->lowered_storage_surface_state
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: desc->buffer_view->storage_surface_state;
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assert(surface_state.alloc_size);
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if (need_client_mem_relocs) {
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