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radv: remove vs_common_out:export_prim_id

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13062>
This commit is contained in:
Samuel Pitoiset
2021-09-27 14:35:54 +02:00
committed by Marge Bot
parent 4a6d119309
commit bff052d6f5
4 changed files with 22 additions and 23 deletions
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19
src/amd/vulkan/radv_pipeline.c
View File

@@ -2865,22 +2865,27 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
radv_nir_shader_info_pass(pipeline->device, nir[MESA_SHADER_FRAGMENT], pipeline->layout,
&keys[MESA_SHADER_FRAGMENT], &infos[MESA_SHADER_FRAGMENT]);
assert(pipeline->graphics.last_vgt_api_stage != MESA_SHADER_NONE);
if (infos[MESA_SHADER_FRAGMENT].ps.prim_id_input) {
if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_VERTEX) {
infos[MESA_SHADER_VERTEX].vs.outinfo.export_prim_id = true;
} else if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_TESS_EVAL) {
infos[MESA_SHADER_TESS_EVAL].tes.outinfo.export_prim_id = true;
} else {
assert(pipeline->graphics.last_vgt_api_stage == MESA_SHADER_GEOMETRY);
}
}
/* TODO: These are no longer used as keys we should refactor this */
keys[MESA_SHADER_VERTEX].vs_common_out.export_prim_id =
infos[MESA_SHADER_FRAGMENT].ps.prim_id_input;
keys[MESA_SHADER_VERTEX].vs_common_out.export_clip_dists =
!!infos[MESA_SHADER_FRAGMENT].ps.num_input_clips_culls;
keys[MESA_SHADER_TESS_EVAL].vs_common_out.export_prim_id =
infos[MESA_SHADER_FRAGMENT].ps.prim_id_input;
keys[MESA_SHADER_TESS_EVAL].vs_common_out.export_clip_dists =
!!infos[MESA_SHADER_FRAGMENT].ps.num_input_clips_culls;
/* NGG passthrough mode can't be enabled for vertex shaders
* that export the primitive ID.
*
* TODO: I should really refactor the keys logic.
*/
if (nir[MESA_SHADER_VERTEX] && keys[MESA_SHADER_VERTEX].vs_common_out.export_prim_id) {
if (nir[MESA_SHADER_VERTEX] && infos[MESA_SHADER_VERTEX].vs.outinfo.export_prim_id) {
keys[MESA_SHADER_VERTEX].vs_common_out.as_ngg_passthrough = false;
}

12
src/amd/vulkan/radv_shader.c
View File

@@ -943,7 +943,7 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir,
num_vertices_per_prim = 2;
/* Manually mark the primitive ID used, so the shader can repack it. */
if (key->vs_common_out.export_prim_id)
if (info->tes.outinfo.export_prim_id)
BITSET_SET(nir->info.system_values_read, SYSTEM_VALUE_PRIMITIVE_ID);
} else if (nir->info.stage == MESA_SHADER_VERTEX) {
@@ -965,11 +965,19 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir,
if (nir->info.stage == MESA_SHADER_VERTEX ||
nir->info.stage == MESA_SHADER_TESS_EVAL) {
bool export_prim_id;
assert(key->vs_common_out.as_ngg);
if (consider_culling)
radv_optimize_nir_algebraic(nir, false);
if (nir->info.stage == MESA_SHADER_VERTEX) {
export_prim_id = info->vs.outinfo.export_prim_id;
} else {
export_prim_id = info->tes.outinfo.export_prim_id;
}
out_conf =
ac_nir_lower_ngg_nogs(
nir,
@@ -979,7 +987,7 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir,
info->wave_size,
consider_culling,
key->vs_common_out.as_ngg_passthrough,
key->vs_common_out.export_prim_id,
export_prim_id,
key->vs.provoking_vtx_last,
false,
key->vs.instance_rate_inputs);

1
src/amd/vulkan/radv_shader.h
View File

@@ -52,7 +52,6 @@ struct radv_vs_out_key {
uint32_t as_ls : 1;
uint32_t as_ngg : 1;
uint32_t as_ngg_passthrough : 1;
uint32_t export_prim_id : 1;
uint32_t export_clip_dists : 1;
};

13
src/amd/vulkan/radv_shader_info.c
View File

@@ -603,19 +603,6 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n
}
}
/* Make sure to export the PrimitiveID if the fragment shader needs it. */
if (key->vs_common_out.export_prim_id) {
switch (nir->info.stage) {
case MESA_SHADER_VERTEX:
info->vs.outinfo.export_prim_id = true;
break;
case MESA_SHADER_TESS_EVAL:
info->tes.outinfo.export_prim_id = true;
break;
default:
break;
}
}
/* Make sure to export the clip/cull distances if the fragment shader needs it. */
if (key->vs_common_out.export_clip_dists) {