radv: remove vs_common_out:export_prim_id
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13062>
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@@ -2865,22 +2865,27 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
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radv_nir_shader_info_pass(pipeline->device, nir[MESA_SHADER_FRAGMENT], pipeline->layout,
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radv_nir_shader_info_pass(pipeline->device, nir[MESA_SHADER_FRAGMENT], pipeline->layout,
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&keys[MESA_SHADER_FRAGMENT], &infos[MESA_SHADER_FRAGMENT]);
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&keys[MESA_SHADER_FRAGMENT], &infos[MESA_SHADER_FRAGMENT]);
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assert(pipeline->graphics.last_vgt_api_stage != MESA_SHADER_NONE);
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if (infos[MESA_SHADER_FRAGMENT].ps.prim_id_input) {
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if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_VERTEX) {
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infos[MESA_SHADER_VERTEX].vs.outinfo.export_prim_id = true;
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} else if (pipeline->graphics.last_vgt_api_stage == MESA_SHADER_TESS_EVAL) {
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infos[MESA_SHADER_TESS_EVAL].tes.outinfo.export_prim_id = true;
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} else {
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assert(pipeline->graphics.last_vgt_api_stage == MESA_SHADER_GEOMETRY);
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}
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}
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/* TODO: These are no longer used as keys we should refactor this */
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/* TODO: These are no longer used as keys we should refactor this */
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keys[MESA_SHADER_VERTEX].vs_common_out.export_prim_id =
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infos[MESA_SHADER_FRAGMENT].ps.prim_id_input;
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keys[MESA_SHADER_VERTEX].vs_common_out.export_clip_dists =
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keys[MESA_SHADER_VERTEX].vs_common_out.export_clip_dists =
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!!infos[MESA_SHADER_FRAGMENT].ps.num_input_clips_culls;
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!!infos[MESA_SHADER_FRAGMENT].ps.num_input_clips_culls;
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keys[MESA_SHADER_TESS_EVAL].vs_common_out.export_prim_id =
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infos[MESA_SHADER_FRAGMENT].ps.prim_id_input;
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keys[MESA_SHADER_TESS_EVAL].vs_common_out.export_clip_dists =
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keys[MESA_SHADER_TESS_EVAL].vs_common_out.export_clip_dists =
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!!infos[MESA_SHADER_FRAGMENT].ps.num_input_clips_culls;
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!!infos[MESA_SHADER_FRAGMENT].ps.num_input_clips_culls;
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/* NGG passthrough mode can't be enabled for vertex shaders
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/* NGG passthrough mode can't be enabled for vertex shaders
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* that export the primitive ID.
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* that export the primitive ID.
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*
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* TODO: I should really refactor the keys logic.
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*/
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*/
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if (nir[MESA_SHADER_VERTEX] && keys[MESA_SHADER_VERTEX].vs_common_out.export_prim_id) {
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if (nir[MESA_SHADER_VERTEX] && infos[MESA_SHADER_VERTEX].vs.outinfo.export_prim_id) {
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keys[MESA_SHADER_VERTEX].vs_common_out.as_ngg_passthrough = false;
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keys[MESA_SHADER_VERTEX].vs_common_out.as_ngg_passthrough = false;
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}
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}
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@@ -943,7 +943,7 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir,
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num_vertices_per_prim = 2;
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num_vertices_per_prim = 2;
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/* Manually mark the primitive ID used, so the shader can repack it. */
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/* Manually mark the primitive ID used, so the shader can repack it. */
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if (key->vs_common_out.export_prim_id)
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if (info->tes.outinfo.export_prim_id)
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BITSET_SET(nir->info.system_values_read, SYSTEM_VALUE_PRIMITIVE_ID);
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BITSET_SET(nir->info.system_values_read, SYSTEM_VALUE_PRIMITIVE_ID);
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} else if (nir->info.stage == MESA_SHADER_VERTEX) {
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} else if (nir->info.stage == MESA_SHADER_VERTEX) {
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@@ -965,11 +965,19 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir,
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if (nir->info.stage == MESA_SHADER_VERTEX ||
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if (nir->info.stage == MESA_SHADER_VERTEX ||
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nir->info.stage == MESA_SHADER_TESS_EVAL) {
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nir->info.stage == MESA_SHADER_TESS_EVAL) {
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bool export_prim_id;
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assert(key->vs_common_out.as_ngg);
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assert(key->vs_common_out.as_ngg);
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if (consider_culling)
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if (consider_culling)
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radv_optimize_nir_algebraic(nir, false);
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radv_optimize_nir_algebraic(nir, false);
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if (nir->info.stage == MESA_SHADER_VERTEX) {
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export_prim_id = info->vs.outinfo.export_prim_id;
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} else {
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export_prim_id = info->tes.outinfo.export_prim_id;
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}
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out_conf =
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out_conf =
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ac_nir_lower_ngg_nogs(
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ac_nir_lower_ngg_nogs(
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nir,
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nir,
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@@ -979,7 +987,7 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir,
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info->wave_size,
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info->wave_size,
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consider_culling,
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consider_culling,
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key->vs_common_out.as_ngg_passthrough,
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key->vs_common_out.as_ngg_passthrough,
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key->vs_common_out.export_prim_id,
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export_prim_id,
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key->vs.provoking_vtx_last,
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key->vs.provoking_vtx_last,
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false,
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false,
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key->vs.instance_rate_inputs);
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key->vs.instance_rate_inputs);
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@@ -52,7 +52,6 @@ struct radv_vs_out_key {
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uint32_t as_ls : 1;
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uint32_t as_ls : 1;
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uint32_t as_ngg : 1;
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uint32_t as_ngg : 1;
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uint32_t as_ngg_passthrough : 1;
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uint32_t as_ngg_passthrough : 1;
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uint32_t export_prim_id : 1;
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uint32_t export_clip_dists : 1;
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uint32_t export_clip_dists : 1;
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};
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};
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@@ -603,19 +603,6 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n
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}
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}
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}
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}
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/* Make sure to export the PrimitiveID if the fragment shader needs it. */
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if (key->vs_common_out.export_prim_id) {
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switch (nir->info.stage) {
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case MESA_SHADER_VERTEX:
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info->vs.outinfo.export_prim_id = true;
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break;
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case MESA_SHADER_TESS_EVAL:
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info->tes.outinfo.export_prim_id = true;
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break;
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default:
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break;
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}
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}
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/* Make sure to export the clip/cull distances if the fragment shader needs it. */
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/* Make sure to export the clip/cull distances if the fragment shader needs it. */
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if (key->vs_common_out.export_clip_dists) {
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if (key->vs_common_out.export_clip_dists) {
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