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nir: Stop passing an options arg to nir_lower_int64()

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This information is exposed through shader->options->lower_int64_options.
Removing the extra arg forces drivers to initialize this field correctly.

This also allows us to check the int64 lowering options from each int64
lowering helper and decide if we should lower the instructions we
introduce.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5588>
This commit is contained in:
Boris Brezillon
2020-07-13 20:28:16 +02:00
committed by Marge Bot
parent 9e23925991
commit bfee35b45c
8 changed files with 16 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/amd/compiler/aco_instruction_selection_setup.cpp
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@@ -1350,7 +1350,7 @@ setup_nir(isel_context *ctx, nir_shader *nir)
nir_lower_pack(nir);
/* lower ALU operations */
nir_lower_int64(nir, nir->options->lower_int64_options);
nir_lower_int64(nir);
if (nir_lower_bit_size(nir, lower_bit_size_callback, NULL))
nir_copy_prop(nir); /* allow nir_opt_idiv_const() to optimize lowered divisions */

2
src/compiler/nir/nir.h
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@@ -4483,7 +4483,7 @@ bool nir_lower_bit_size(nir_shader *shader,
void *callback_data);
nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
bool nir_lower_int64(nir_shader *shader);
nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,

22
src/compiler/nir/nir_lower_int64.c
View File

@@ -866,16 +866,11 @@ lower_int64_alu_instr(nir_builder *b, nir_instr *instr, void *_state)
}
}
typedef struct {
const nir_shader_compiler_options *shader_options;
nir_lower_int64_options options;
} should_lower_cb_data;
static bool
should_lower_int64_alu_instr(const nir_instr *instr, const void *_data)
{
const should_lower_cb_data *cb_data = (const should_lower_cb_data *)_data;
const nir_lower_int64_options options = cb_data->options;
const nir_shader_compiler_options *options =
(const nir_shader_compiler_options *)_data;
if (instr->type != nir_instr_type_alu)
return false;
@@ -922,7 +917,7 @@ should_lower_int64_alu_instr(const nir_instr *instr, const void *_data)
break;
case nir_op_amul:
assert(alu->dest.dest.is_ssa);
if (cb_data->shader_options->has_imul24)
if (options->has_imul24)
return false;
if (alu->dest.dest.ssa.bit_size != 64)
return false;
@@ -934,18 +929,15 @@ should_lower_int64_alu_instr(const nir_instr *instr, const void *_data)
break;
}
return (options & nir_lower_int64_op_to_options_mask(alu->op)) != 0;
unsigned mask = nir_lower_int64_op_to_options_mask(alu->op);
return (options->lower_int64_options & mask) != 0;
}
bool
nir_lower_int64(nir_shader *shader, nir_lower_int64_options options)
nir_lower_int64(nir_shader *shader)
{
should_lower_cb_data cb_data;
cb_data.shader_options = shader->options;
cb_data.options = options;
return nir_shader_lower_instructions(shader,
should_lower_int64_alu_instr,
lower_int64_alu_instr,
&cb_data);
(void *)shader->options);
}

2
src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
View File

@@ -480,7 +480,7 @@ int main(int argc, char **argv)
ir3_glsl_type_size, (nir_lower_io_options)0);
/* TODO do this somewhere else */
nir_lower_int64(nir, ~0);
nir_lower_int64(nir);
nir_lower_system_values(nir);
} else if (num_files > 0) {
nir = load_glsl(num_files, filenames, stage);

2
src/gallium/drivers/r600/r600_shader.c
View File

@@ -200,7 +200,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
if (!ctx->screen->get_param(ctx->screen, PIPE_CAP_DOUBLES)) {
NIR_PASS_V(sel->nir, nir_lower_regs_to_ssa);
NIR_PASS_V(sel->nir, nir_lower_alu_to_scalar, NULL, NULL);
NIR_PASS_V(sel->nir, nir_lower_int64, ~0);
NIR_PASS_V(sel->nir, nir_lower_int64);
NIR_PASS_V(sel->nir, nir_opt_vectorize);
}
NIR_PASS_V(sel->nir, nir_lower_flrp, ~0, false, false);

3
src/gallium/frontends/clover/nir/invocation.cpp
View File

@@ -144,8 +144,7 @@ module clover::nir::spirv_to_nir(const module &mod, const device &dev,
NIR_PASS_V(nir, nir_lower_system_values);
if (compiler_options->lower_int64_options)
NIR_PASS_V(nir, nir_lower_int64,
compiler_options->lower_int64_options);
NIR_PASS_V(nir, nir_lower_int64);
NIR_PASS_V(nir, nir_opt_dce);

4
src/intel/compiler/brw_nir.c
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@@ -688,7 +688,7 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
brw_nir_optimize(nir, compiler, is_scalar, true);
OPT(nir_lower_doubles, softfp64, nir->options->lower_doubles_options);
OPT(nir_lower_int64, nir->options->lower_int64_options);
OPT(nir_lower_int64);
OPT(nir_lower_bit_size, lower_bit_size_callback, (void *)compiler);
@@ -925,7 +925,7 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
brw_vectorize_lower_mem_access(nir, compiler, is_scalar);
if (OPT(nir_lower_int64, nir->options->lower_int64_options))
if (OPT(nir_lower_int64))
brw_nir_optimize(nir, compiler, is_scalar, false);
if (devinfo->gen >= 6) {

6
src/mesa/state_tracker/st_glsl_to_nir.cpp
View File

@@ -497,10 +497,8 @@ st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
NIR_PASS(lowered_64bit_ops, nir, nir_lower_doubles,
st->ctx->SoftFP64, nir->options->lower_doubles_options);
}
if (nir->options->lower_int64_options) {
NIR_PASS(lowered_64bit_ops, nir, nir_lower_int64,
nir->options->lower_int64_options);
}
if (nir->options->lower_int64_options)
NIR_PASS(lowered_64bit_ops, nir, nir_lower_int64);
if (lowered_64bit_ops)
st_nir_opts(nir);