From bf4234d0887d4505f2aae825d23a0144c60e0240 Mon Sep 17 00:00:00 2001 From: Gert Wollny Date: Tue, 23 Aug 2022 17:31:57 +0200 Subject: [PATCH] r600/sfn: Use a low number for unused target register This reduces the number of registers reserved by the shader units and makes more threads possible. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6856 Fixes: 79ca456b4837b3bc21cf9ef3c03c505c4b4909f6 r600/sfn: rewrite NIR backend Signed-off-by: Gert Wollny Reviewed-by: Filip Gawin Part-of: --- src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp b/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp index fba7f1f39da..53bdfad8e82 100644 --- a/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_instr_tex.cpp @@ -682,7 +682,7 @@ bool TexInstr::emit_tex_txd(nir_tex_instr *tex, Inputs& src, Shader& shader) << "' (" << __func__ << ")\n"; auto dst = vf.dest_vec4(tex->dest, pin_group); - RegisterVec4 empty_dst(126, false, {0,0,0,0}, pin_group); + RegisterVec4 empty_dst(0, false, {0,0,0,0}, pin_group); auto swizzle = src.swizzle_from_ncomps(tex->coord_components);