nir: Rename load/store_reg -> load/store_register

This frees up the shorter names for the new register-based intrinsics.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23956>
This commit is contained in:
Alyssa Rosenzweig
2023-05-23 16:12:51 -04:00
parent f9a0423a20
commit bed2f3f8e6
4 changed files with 10 additions and 10 deletions

View File

@@ -1475,13 +1475,13 @@ nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
}
static inline nir_ssa_def *
nir_load_reg(nir_builder *build, nir_register *reg)
nir_load_register(nir_builder *build, nir_register *reg)
{
return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
}
static inline void
nir_store_reg(nir_builder *build, nir_register *reg,
nir_store_register(nir_builder *build, nir_register *reg,
nir_ssa_def *def, nir_component_mask_t write_mask)
{
assert(reg->num_components == def->num_components);

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@@ -950,7 +950,7 @@ place_phi_read(nir_builder *b, nir_register *reg,
}
b->cursor = nir_after_block_before_jump(block);
nir_store_reg(b, reg, def, ~0);
nir_store_register(b, reg, def, ~0);
}
/** Lower all of the phi nodes in a block to movs to and from a register
@@ -995,7 +995,7 @@ nir_lower_phis_to_regs_block(nir_block *block)
nir_register *reg = create_reg_for_ssa_def(&phi->dest.ssa, b.impl);
b.cursor = nir_after_instr(&phi->instr);
nir_ssa_def *def = nir_load_reg(&b, reg);
nir_ssa_def *def = nir_load_register(&b, reg);
nir_ssa_def_rewrite_uses(&phi->dest.ssa, def);
@@ -1008,7 +1008,7 @@ nir_lower_phis_to_regs_block(nir_block *block)
b.cursor = nir_after_block_before_jump(src->pred);
nir_ssa_def *src_ssa =
nir_ssa_for_src(&b, src->src, phi->dest.ssa.num_components);
nir_store_reg(&b, reg, src_ssa, ~0);
nir_store_register(&b, reg, src_ssa, ~0);
}
}

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@@ -859,11 +859,11 @@ duplicate_loop_bodies(nir_function_impl *impl, nir_instr *resume_instr)
/* Initialize resume to true */
b.cursor = nir_before_cf_list(&impl->body);
nir_store_reg(&b, resume_reg, nir_imm_true(&b), 1);
nir_store_register(&b, resume_reg, nir_imm_true(&b), 1);
/* Set resume to false right after the resume instruction */
b.cursor = nir_after_instr(resume_instr);
nir_store_reg(&b, resume_reg, nir_imm_false(&b), 1);
nir_store_register(&b, resume_reg, nir_imm_false(&b), 1);
}
/* Before we go any further, make sure that everything which exits the

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@@ -182,7 +182,7 @@ ptn_get_src(struct ptn_compile *c, const struct prog_src_register *prog_src)
nir_ssa_def *index = nir_imm_int(b, prog_src->Index);
if (prog_src->RelAddr)
index = nir_iadd(b, index, nir_load_reg(b, c->addr_reg));
index = nir_iadd(b, index, nir_load_register(b, c->addr_reg));
deref = nir_build_deref_array(b, deref, nir_channel(b, index, 0));
src.src = nir_src_for_ssa(nir_load_deref(b, deref));
@@ -836,7 +836,7 @@ ptn_add_output_stores(struct ptn_compile *c)
nir_builder *b = &c->build;
nir_foreach_shader_out_variable(var, b->shader) {
nir_ssa_def *src = nir_load_reg(b, c->output_regs[var->data.location]);
nir_ssa_def *src = nir_load_register(b, c->output_regs[var->data.location]);
if (c->prog->Target == GL_FRAGMENT_PROGRAM_ARB &&
var->data.location == FRAG_RESULT_DEPTH) {
/* result.depth has this strange convention of being the .z component of