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intel/compiler/fs: Pass fs_inst to generate_ddx/ddy instead of opcode

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In a future patch, generate_ddy will want to inspect inst->exec_size.
Change generate_ddx as well for consistency.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Matt Turner
2017-06-15 15:41:40 -07:00
parent 3a584a15c0
commit bed0267ff6
2 changed files with 10 additions and 8 deletions
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6
src/intel/compiler/brw_fs.h
View File

@@ -417,8 +417,10 @@ private:
void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst, void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst,
struct brw_reg src, struct brw_reg src,
struct brw_reg surf_index); struct brw_reg surf_index);
void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src); void generate_ddx(const fs_inst *inst,
void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src); struct brw_reg dst, struct brw_reg src);
void generate_ddy(const fs_inst *inst,
struct brw_reg dst, struct brw_reg src);
void generate_scratch_write(fs_inst *inst, struct brw_reg src); void generate_scratch_write(fs_inst *inst, struct brw_reg src);
void generate_scratch_read(fs_inst *inst, struct brw_reg dst); void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst); void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);

12
src/intel/compiler/brw_fs_generator.cpp
View File

@@ -1148,12 +1148,12 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
* appropriate swizzling. * appropriate swizzling.
*/ */
void void
fs_generator::generate_ddx(enum opcode opcode, fs_generator::generate_ddx(const fs_inst *inst,
struct brw_reg dst, struct brw_reg src) struct brw_reg dst, struct brw_reg src)
{ {
unsigned vstride, width; unsigned vstride, width;
if (opcode == FS_OPCODE_DDX_FINE) { if (inst->opcode == FS_OPCODE_DDX_FINE) {
/* produce accurate derivatives */ /* produce accurate derivatives */
vstride = BRW_VERTICAL_STRIDE_2; vstride = BRW_VERTICAL_STRIDE_2;
width = BRW_WIDTH_2; width = BRW_WIDTH_2;
@@ -1185,10 +1185,10 @@ fs_generator::generate_ddx(enum opcode opcode,
* left. * left.
*/ */
void void
fs_generator::generate_ddy(enum opcode opcode, fs_generator::generate_ddy(const fs_inst *inst,
struct brw_reg dst, struct brw_reg src) struct brw_reg dst, struct brw_reg src)
{ {
if (opcode == FS_OPCODE_DDY_FINE) { if (inst->opcode == FS_OPCODE_DDY_FINE) {
/* produce accurate derivatives */ /* produce accurate derivatives */
struct brw_reg src0 = brw_reg(src.file, src.nr, 0, struct brw_reg src0 = brw_reg(src.file, src.nr, 0,
src.negate, src.abs, src.negate, src.abs,
@@ -2044,11 +2044,11 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
break; break;
case FS_OPCODE_DDX_COARSE: case FS_OPCODE_DDX_COARSE:
case FS_OPCODE_DDX_FINE: case FS_OPCODE_DDX_FINE:
generate_ddx(inst->opcode, dst, src[0]); generate_ddx(inst, dst, src[0]);
break; break;
case FS_OPCODE_DDY_COARSE: case FS_OPCODE_DDY_COARSE:
case FS_OPCODE_DDY_FINE: case FS_OPCODE_DDY_FINE:
generate_ddy(inst->opcode, dst, src[0]); generate_ddy(inst, dst, src[0]);
break; break;
case SHADER_OPCODE_GEN4_SCRATCH_WRITE: case SHADER_OPCODE_GEN4_SCRATCH_WRITE: