pan/mdg: eliminate references to ins->load_store.op

This commit makes `ins->op` the correct field to use with load_store
instructions.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
This commit is contained in:
Italo Nicola
2020-07-23 19:24:39 +00:00
committed by Marge Bot
parent 92c808cd47
commit bea6a652db
9 changed files with 48 additions and 36 deletions

View File

@@ -595,9 +595,8 @@ v_load_store_scratch(
.dest = ~0,
.src = { ~0, ~0, ~0, ~0 },
.swizzle = SWIZZLE_IDENTITY_4,
.op = is_store ? midgard_op_st_int4 : midgard_op_ld_int4,
.load_store = {
.op = is_store ? midgard_op_st_int4 : midgard_op_ld_int4,
/* For register spilling - to thread local storage */
.arg_1 = 0xEA,
.arg_2 = 0x1E,

View File

@@ -110,8 +110,8 @@ schedule_barrier(compiler_context *ctx)
.dest = ~0, \
.src = { ~0, ~0, ~0, ~0 }, \
.swizzle = SWIZZLE_IDENTITY_4, \
.op = midgard_op_##name, \
.load_store = { \
.op = midgard_op_##name, \
.address = address \
} \
}; \
@@ -1412,16 +1412,16 @@ emit_varying_read(
switch (type) {
case nir_type_uint32:
case nir_type_bool32:
ins.load_store.op = midgard_op_ld_vary_32u;
ins.op = midgard_op_ld_vary_32u;
break;
case nir_type_int32:
ins.load_store.op = midgard_op_ld_vary_32i;
ins.op = midgard_op_ld_vary_32i;
break;
case nir_type_float32:
ins.load_store.op = midgard_op_ld_vary_32;
ins.op = midgard_op_ld_vary_32;
break;
case nir_type_float16:
ins.load_store.op = midgard_op_ld_vary_16;
ins.op = midgard_op_ld_vary_16;
break;
default:
unreachable("Attempted to load unknown type");
@@ -1446,13 +1446,13 @@ emit_attr_read(
switch (t) {
case nir_type_uint:
case nir_type_bool:
ins.load_store.op = midgard_op_ld_attr_32u;
ins.op = midgard_op_ld_attr_32u;
break;
case nir_type_int:
ins.load_store.op = midgard_op_ld_attr_32i;
ins.op = midgard_op_ld_attr_32i;
break;
case nir_type_float:
ins.load_store.op = midgard_op_ld_attr_32;
ins.op = midgard_op_ld_attr_32;
break;
default:
unreachable("Attempted to load unknown type");
@@ -1583,7 +1583,7 @@ emit_msaa_builtin(compiler_context *ctx, nir_intrinsic_instr *instr)
unsigned reg = nir_dest_index(&instr->dest);
midgard_instruction ld = m_ld_color_buffer_32u(reg, 0);
ld.load_store.op = midgard_op_ld_color_buffer_32u_old;
ld.op = midgard_op_ld_color_buffer_32u_old;
ld.load_store.address = 97;
ld.load_store.arg_2 = 0x1E;
@@ -1775,7 +1775,7 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
}
if (ctx->quirks & MIDGARD_OLD_BLEND) {
ld.load_store.op = midgard_op_ld_color_buffer_32u_old;
ld.op = midgard_op_ld_color_buffer_32u_old;
ld.load_store.address = 16;
ld.load_store.arg_2 = 0x1E;
}
@@ -1802,9 +1802,9 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
if (ctx->quirks & MIDGARD_OLD_BLEND) {
if (bits == 16)
ld.load_store.op = midgard_op_ld_color_buffer_as_fp16_old;
ld.op = midgard_op_ld_color_buffer_as_fp16_old;
else
ld.load_store.op = midgard_op_ld_color_buffer_as_fp32_old;
ld.op = midgard_op_ld_color_buffer_as_fp32_old;
ld.load_store.address = 1;
ld.load_store.arg_2 = 0x1E;
}
@@ -1907,13 +1907,13 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
switch (nir_alu_type_get_base_type(nir_intrinsic_type(instr))) {
case nir_type_uint:
case nir_type_bool:
st.load_store.op = midgard_op_st_vary_32u;
st.op = midgard_op_st_vary_32u;
break;
case nir_type_int:
st.load_store.op = midgard_op_st_vary_32i;
st.op = midgard_op_st_vary_32i;
break;
case nir_type_float:
st.load_store.op = midgard_op_st_vary_32;
st.op = midgard_op_st_vary_32;
break;
default:
unreachable("Attempted to store unknown type");

View File

@@ -487,6 +487,14 @@ mir_lower_roundmode(midgard_instruction *ins)
}
}
static midgard_load_store_word
load_store_from_instr(midgard_instruction *ins)
{
midgard_load_store_word ldst = ins->load_store;
ldst.op = ins->op;
return ldst;
}
static midgard_texture_word
texture_word_from_instr(midgard_instruction *ins)
{
@@ -643,7 +651,7 @@ emit_binary_bundle(compiler_context *ctx,
unsigned offset = bundle->instructions[i]->constants.u32[0];
if (offset) {
unsigned shift = mir_ldst_imm_shift(bundle->instructions[i]->load_store.op);
unsigned shift = mir_ldst_imm_shift(bundle->instructions[i]->op);
unsigned upper_shift = 10 - shift;
bundle->instructions[i]->load_store.varying_parameters |= (offset & ((1 << upper_shift) - 1)) << shift;
@@ -651,10 +659,15 @@ emit_binary_bundle(compiler_context *ctx,
}
}
memcpy(&current64, &bundle->instructions[0]->load_store, sizeof(current64));
midgard_load_store_word ldst0 =
load_store_from_instr(bundle->instructions[0]);
memcpy(&current64, &ldst0, sizeof(current64));
if (bundle->instruction_count == 2)
memcpy(&next64, &bundle->instructions[1]->load_store, sizeof(next64));
if (bundle->instruction_count == 2) {
midgard_load_store_word ldst1 =
load_store_from_instr(bundle->instructions[1]);
memcpy(&next64, &ldst1, sizeof(next64));
}
midgard_load_store instruction = {
.type = bundle->tag,

View File

@@ -107,7 +107,7 @@ midgard_opt_copy_prop(compiler_context *ctx, midgard_block *block)
unsigned start =
is_tex ? 2 :
OP_IS_STORE(q->load_store.op) ? 1 : 0;
OP_IS_STORE(q->op) ? 1 : 0;
mir_foreach_src(q, s) {
if ((s >= start) && q->src[s] == to) {

View File

@@ -40,7 +40,7 @@ can_cull_mask(compiler_context *ctx, midgard_instruction *ins)
return false;
if (ins->type == TAG_LOAD_STORE_4)
if (load_store_opcode_props[ins->load_store.op].props & LDST_SPECIAL_MASK)
if (load_store_opcode_props[ins->op].props & LDST_SPECIAL_MASK)
return false;
return true;
@@ -56,7 +56,7 @@ can_dce(midgard_instruction *ins)
return false;
if (ins->type == TAG_LOAD_STORE_4)
if (load_store_opcode_props[ins->load_store.op].props & LDST_SIDE_FX)
if (load_store_opcode_props[ins->op].props & LDST_SIDE_FX)
return false;
if (ins->type == TAG_TEXTURE_4)

View File

@@ -101,7 +101,7 @@ midgard_opt_combine_projection(compiler_context *ctx, midgard_block *block)
mir_foreach_instr_in_block_safe(block, v) {
if (v->dest != frcp_from) continue;
if (v->type != TAG_LOAD_STORE_4) break;
if (!OP_IS_LOAD_VARY_F(v->load_store.op)) break;
if (!OP_IS_LOAD_VARY_F(v->op)) break;
ok = true;
break;
@@ -120,10 +120,10 @@ midgard_opt_combine_projection(compiler_context *ctx, midgard_block *block)
.src = { frcp_from, ~0, ~0, ~0 },
.src_types = { nir_type_float32 },
.swizzle = SWIZZLE_IDENTITY_4,
.op = frcp_component == COMPONENT_W ?
midgard_op_ldst_perspective_division_w :
midgard_op_ldst_perspective_division_z,
.load_store = {
.op = frcp_component == COMPONENT_W ?
midgard_op_ldst_perspective_division_w :
midgard_op_ldst_perspective_division_z,
.arg_1 = 0x20
}
};
@@ -145,7 +145,7 @@ midgard_opt_varying_projection(compiler_context *ctx, midgard_block *block)
mir_foreach_instr_in_block_safe(block, ins) {
/* Search for a projection */
if (ins->type != TAG_LOAD_STORE_4) continue;
if (!OP_IS_PROJECTION(ins->load_store.op)) continue;
if (!OP_IS_PROJECTION(ins->op)) continue;
unsigned vary = ins->src[0];
unsigned to = ins->dest;
@@ -161,7 +161,7 @@ midgard_opt_varying_projection(compiler_context *ctx, midgard_block *block)
mir_foreach_instr_in_block_safe(block, v) {
if (v->dest != vary) continue;
if (v->type != TAG_LOAD_STORE_4) break;
if (!OP_IS_LOAD_VARY_F(v->load_store.op)) break;
if (!OP_IS_LOAD_VARY_F(v->op)) break;
/* We found it, so rewrite it to project. Grab the
* modifier */
@@ -174,7 +174,7 @@ midgard_opt_varying_projection(compiler_context *ctx, midgard_block *block)
break;
bool projects_w =
ins->load_store.op == midgard_op_ldst_perspective_division_w;
ins->op == midgard_op_ldst_perspective_division_w;
p.modifier = projects_w ?
midgard_varying_mod_perspective_w :

View File

@@ -340,7 +340,7 @@ mir_print_instruction(midgard_instruction *ins)
}
case TAG_LOAD_STORE_4: {
midgard_load_store_op op = ins->load_store.op;
midgard_load_store_op op = ins->op;
const char *name = load_store_opcode_props[op].name;
assert(name);

View File

@@ -450,7 +450,7 @@ allocate_registers(compiler_context *ctx, bool *spilled)
}
}
if (ins->type == TAG_LOAD_STORE_4 && OP_HAS_ADDRESS(ins->load_store.op)) {
if (ins->type == TAG_LOAD_STORE_4 && OP_HAS_ADDRESS(ins->op)) {
mir_foreach_src(ins, v) {
unsigned s = ins->src[v];
unsigned size = nir_alu_type_get_type_size(ins->src_types[v]);
@@ -530,7 +530,7 @@ allocate_registers(compiler_context *ctx, bool *spilled)
set_class(l->class, ins->src[1], REG_CLASS_LDST);
set_class(l->class, ins->src[2], REG_CLASS_LDST);
if (OP_IS_VEC4_ONLY(ins->load_store.op)) {
if (OP_IS_VEC4_ONLY(ins->op)) {
lcra_restrict_range(l, ins->dest, 16);
lcra_restrict_range(l, ins->src[0], 16);
lcra_restrict_range(l, ins->src[1], 16);
@@ -716,7 +716,7 @@ install_registers_instr(
* whether we are loading or storing -- think about the
* logical dataflow */
bool encodes_src = OP_IS_STORE(ins->load_store.op);
bool encodes_src = OP_IS_STORE(ins->op);
if (encodes_src) {
struct phys_reg src = index_to_reg(ctx, l, ins->src[0], src_shift[0]);

View File

@@ -43,7 +43,7 @@ mir_is_promoteable_ubo(midgard_instruction *ins)
/* TODO: promote unaligned access via swizzle? */
return (ins->type == TAG_LOAD_STORE_4) &&
(OP_IS_UBO_READ(ins->load_store.op)) &&
(OP_IS_UBO_READ(ins->op)) &&
!(ins->constants.u32[0] & 0xF) &&
!(ins->load_store.arg_1) &&
(ins->load_store.arg_2 == 0x1E) &&