Fix writemasks on texture arb fp instructions.
Cleanup invarient state emission.
This commit is contained in:
@@ -39,6 +39,7 @@
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#define I830_UPLOAD_CTX 0x1
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#define I830_UPLOAD_BUFFERS 0x2
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#define I830_UPLOAD_STIPPLE 0x4
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#define I830_UPLOAD_INVARIENT 0x8
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#define I830_UPLOAD_TEX(i) (0x10<<(i))
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#define I830_UPLOAD_TEXBLEND(i) (0x100<<(i))
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#define I830_UPLOAD_TEX_ALL (0x0f0)
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@@ -40,7 +40,8 @@
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/* A large amount of state doesn't need to be uploaded.
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*/
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#define ACTIVE (I830_UPLOAD_TEXBLEND(0) | \
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#define ACTIVE (I830_UPLOAD_INVARIENT | \
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I830_UPLOAD_TEXBLEND(0) | \
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I830_UPLOAD_STIPPLE | \
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I830_UPLOAD_CTX | \
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I830_UPLOAD_BUFFERS | \
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@@ -264,7 +264,7 @@ static void i830_emit_invarient_state( intelContextPtr intel )
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{
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BATCH_LOCALS;
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BEGIN_BATCH( 200 );
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BEGIN_BATCH( 40 );
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OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(0));
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OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(1));
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@@ -370,6 +370,9 @@ static GLuint get_state_size( struct i830_hw_state *state )
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GLuint sz = 0;
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GLuint i;
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if (dirty & I830_UPLOAD_INVARIENT)
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sz += 40 * sizeof(int);
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if (dirty & I830_UPLOAD_CTX)
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sz += sizeof(state->Ctx);
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@@ -408,6 +411,11 @@ static void i830_emit_state( intelContextPtr intel )
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counter = intel->batch.counter;
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}
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if (dirty & I830_UPLOAD_INVARIENT) {
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if (VERBOSE) fprintf(stderr, "I830_UPLOAD_INVARIENT:\n");
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i830_emit_invarient_state( intel );
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}
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if (dirty & I830_UPLOAD_CTX) {
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if (VERBOSE) fprintf(stderr, "I830_UPLOAD_CTX:\n");
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emit( i830, state->Ctx, sizeof(state->Ctx) );
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@@ -514,7 +522,6 @@ void i830InitVtbl( i830ContextPtr i830 )
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i830->intel.vtbl.clear_with_tris = i830ClearWithTris;
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i830->intel.vtbl.rotate_window = i830RotateWindow;
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i830->intel.vtbl.destroy = i830_destroy_context;
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i830->intel.vtbl.emit_invarient_state = i830_emit_invarient_state;
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i830->intel.vtbl.emit_state = i830_emit_state;
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i830->intel.vtbl.lost_hardware = i830_lost_hardware;
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i830->intel.vtbl.reduced_primitive_state = i830_reduced_primitive_state;
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@@ -45,6 +45,7 @@
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#define I915_UPLOAD_PROGRAM 0x8
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#define I915_UPLOAD_CONSTANTS 0x10
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#define I915_UPLOAD_FOG 0x20
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#define I915_UPLOAD_INVARIENT 0x40
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#define I915_UPLOAD_TEX(i) (0x00010000<<(i))
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#define I915_UPLOAD_TEX_ALL (0x00ff0000)
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#define I915_UPLOAD_TEX_0_SHIFT 16
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@@ -41,7 +41,8 @@
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/* A large amount of state doesn't need to be uploaded.
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*/
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#define ACTIVE (I915_UPLOAD_PROGRAM | \
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#define ACTIVE (I915_UPLOAD_INVARIENT | \
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I915_UPLOAD_PROGRAM | \
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I915_UPLOAD_STIPPLE | \
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I915_UPLOAD_CTX | \
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I915_UPLOAD_BUFFERS | \
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@@ -201,6 +201,24 @@ GLuint i915_emit_texld( struct i915_fragment_program *p,
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GLuint coord,
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GLuint op )
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{
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if (coord != UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord))) {
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/* No real way to work around this in the general case - need to
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* allocate and declare a new temporary register (a utemp won't
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* do). Will fallback for now.
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*/
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i915_program_error(p, "Can't (yet) swizzle TEX arguments");
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return 0;
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}
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/* Don't worry about saturate as we only support
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*/
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if (destmask != A0_DEST_CHANNEL_ALL) {
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GLuint tmp = i915_get_utemp(p);
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i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, op );
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i915_emit_arith( p, A0_MOV, dest, destmask, 0, tmp, 0, 0 );
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return dest;
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}
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else {
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assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
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assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
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@@ -210,7 +228,6 @@ GLuint i915_emit_texld( struct i915_fragment_program *p,
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*(p->csr++) = (op |
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T0_DEST( dest ) |
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destmask |
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T0_SAMPLER( sampler ));
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*(p->csr++) = T1_ADDRESS_REG( coord );
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@@ -218,6 +235,7 @@ GLuint i915_emit_texld( struct i915_fragment_program *p,
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p->nr_tex_insn++;
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return dest;
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}
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}
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@@ -921,7 +921,8 @@ static void i915_init_packets( i915ContextPtr i915 )
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i915->state.active = (I915_UPLOAD_PROGRAM |
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I915_UPLOAD_STIPPLE |
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I915_UPLOAD_CTX |
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I915_UPLOAD_BUFFERS);
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I915_UPLOAD_BUFFERS |
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I915_UPLOAD_INVARIENT);
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}
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void i915InitStateFunctions( struct dd_function_table *functions )
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@@ -136,7 +136,7 @@ static void i915_emit_invarient_state( intelContextPtr intel )
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{
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BATCH_LOCALS;
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BEGIN_BATCH( 200 );
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BEGIN_BATCH( 20 );
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OUT_BATCH(_3DSTATE_AA_CMD |
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AA_LINE_ECAAR_WIDTH_ENABLE |
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@@ -235,6 +235,9 @@ static GLuint get_state_size( struct i915_hw_state *state )
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GLuint i;
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GLuint sz = 0;
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if (dirty & I915_UPLOAD_INVARIENT)
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sz += 20 * sizeof(int);
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if (dirty & I915_UPLOAD_CTX)
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sz += sizeof(state->Ctx);
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@@ -286,6 +289,11 @@ static void i915_emit_state( intelContextPtr intel )
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if (VERBOSE)
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fprintf(stderr, "%s dirty: %x\n", __FUNCTION__, dirty);
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if (dirty & I915_UPLOAD_INVARIENT) {
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if (VERBOSE) fprintf(stderr, "I915_UPLOAD_INVARIENT:\n");
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i915_emit_invarient_state( intel );
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}
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if (dirty & I915_UPLOAD_CTX) {
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if (VERBOSE) fprintf(stderr, "I915_UPLOAD_CTX:\n");
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emit( i915, state->Ctx, sizeof(state->Ctx) );
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@@ -439,7 +447,6 @@ void i915InitVtbl( i915ContextPtr i915 )
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i915->intel.vtbl.clear_with_tris = i915ClearWithTris;
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i915->intel.vtbl.rotate_window = i915RotateWindow;
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i915->intel.vtbl.destroy = i915_destroy_context;
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i915->intel.vtbl.emit_invarient_state = i915_emit_invarient_state;
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i915->intel.vtbl.emit_state = i915_emit_state;
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i915->intel.vtbl.lost_hardware = i915_lost_hardware;
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i915->intel.vtbl.reduced_primitive_state = i915_reduced_primitive_state;
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@@ -384,8 +384,8 @@ void intelCopyBuffer( const __DRIdrawablePrivate *dPriv,
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intelFlush( &intel->ctx );
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LOCK_HARDWARE( intel );
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intelWaitForFrameCompletion( intel );
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LOCK_HARDWARE( intel );
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if (!rect)
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{
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@@ -279,16 +279,6 @@ void intelInitDriverFunctions( struct dd_function_table *functions )
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static void intel_emit_invarient_state( GLcontext *ctx )
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{
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intelContextPtr intel = INTEL_CONTEXT(ctx);
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intel->vtbl.emit_invarient_state( intel );
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intel->prim.flush = 0;
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/* Make sure this gets to the hardware, even if we have no cliprects:
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*/
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LOCK_HARDWARE( intel );
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intelFlushBatchLocked( intel, GL_TRUE, GL_FALSE, GL_TRUE );
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UNLOCK_HARDWARE( intel );
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}
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@@ -107,7 +107,6 @@ struct intel_context
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struct {
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void (*destroy)( intelContextPtr intel );
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void (*emit_state)( intelContextPtr intel );
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void (*emit_invarient_state)( intelContextPtr intel );
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void (*lost_hardware)( intelContextPtr intel );
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void (*update_texture_state)( intelContextPtr intel );
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