intel: Add some PCI IDs for Haswell.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
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@@ -25,3 +25,8 @@ CHIPSET(0x0162, IVYBRIDGE_GT2, ivb_gt2)
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CHIPSET(0x0156, IVYBRIDGE_M_GT1, ivb_gt1)
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CHIPSET(0x0166, IVYBRIDGE_M_GT2, ivb_gt2)
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CHIPSET(0x015a, IVYBRIDGE_S_GT1, ivb_gt1)
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CHIPSET(0x0402, HASWELL_GT1, hsw_gt1)
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CHIPSET(0x0412, HASWELL_GT2, hsw_gt2)
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CHIPSET(0x0406, HASWELL_M_GT1, hsw_gt1)
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CHIPSET(0x0416, HASWELL_M_GT2, hsw_gt2)
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CHIPSET(0x0A16, HASWELL_M_ULT_GT2, hsw_gt2)
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@@ -86,6 +86,12 @@
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#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166
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#define PCI_CHIP_IVYBRIDGE_S_GT1 0x015a /* Server */
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#define PCI_CHIP_HASWELL_GT1 0x0402 /* Desktop */
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#define PCI_CHIP_HASWELL_GT2 0x0412
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#define PCI_CHIP_HASWELL_M_GT1 0x0406 /* Mobile */
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#define PCI_CHIP_HASWELL_M_GT2 0x0416
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#define PCI_CHIP_HASWELL_M_ULT_GT2 0x0A16 /* Mobile ULT */
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#define IS_MOBILE(devid) (devid == PCI_CHIP_I855_GM || \
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devid == PCI_CHIP_I915_GM || \
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devid == PCI_CHIP_I945_GM || \
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@@ -154,8 +160,11 @@
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#define IS_GEN7(devid) (IS_IVYBRIDGE(devid) || \
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IS_HASWELL(devid))
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#define IS_HSW_GT1(devid) 0
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#define IS_HSW_GT2(devid) 0
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#define IS_HSW_GT1(devid) (devid == PCI_CHIP_HASWELL_GT1 || \
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devid == PCI_CHIP_HASWELL_M_GT1)
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#define IS_HSW_GT2(devid) (devid == PCI_CHIP_HASWELL_GT2 || \
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devid == PCI_CHIP_HASWELL_M_GT2 || \
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devid == PCI_CHIP_HASWELL_M_ULT_GT2)
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#define IS_HASWELL(devid) (IS_HSW_GT1(devid) || \
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IS_HSW_GT2(devid))
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@@ -185,6 +185,15 @@ intelGetString(struct gl_context * ctx, GLenum name)
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case PCI_CHIP_IVYBRIDGE_S_GT1:
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chipset = "Intel(R) Ivybridge Server";
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break;
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case PCI_CHIP_HASWELL_GT1:
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case PCI_CHIP_HASWELL_GT2:
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chipset = "Intel(R) Haswell Desktop";
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break;
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case PCI_CHIP_HASWELL_M_GT1:
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case PCI_CHIP_HASWELL_M_GT2:
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case PCI_CHIP_HASWELL_M_ULT_GT2:
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chipset = "Intel(R) Haswell Mobile";
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break;
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default:
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chipset = "Unknown Intel Chipset";
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break;
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