mesa: Remove Mesa IR opcodes that existed only for NV_vertex_program.
v2: Remove dead positive() function, caught by Matt. Reviewed-by: Brian Paul <brianp@vmware.com> (v1)
This commit is contained in:
@@ -1088,7 +1088,6 @@ upload_program(struct i915_fragment_program *p)
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case OPCODE_BGNLOOP:
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case OPCODE_BGNSUB:
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case OPCODE_BRA:
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case OPCODE_BRK:
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case OPCODE_CAL:
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case OPCODE_CONT:
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@@ -79,23 +79,6 @@
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static const GLfloat ZeroVec[4] = { 0.0F, 0.0F, 0.0F, 0.0F };
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/**
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* Return TRUE for +0 and other positive values, FALSE otherwise.
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* Used for RCC opcode.
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*/
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static inline GLboolean
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positive(float x)
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{
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fi_type fi;
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fi.f = x;
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if (fi.i & 0x80000000)
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return GL_FALSE;
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return GL_TRUE;
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}
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/**
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* Return a pointer to the 4-element float vector specified by the given
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* source register.
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@@ -728,13 +711,6 @@ _mesa_execute_program(struct gl_context * ctx,
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break;
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case OPCODE_ENDSUB: /* end subroutine */
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break;
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case OPCODE_BRA: /* branch (conditional) */
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if (eval_condition(machine, inst)) {
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/* take branch */
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/* Subtract 1 here since we'll do pc++ below */
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pc = inst->BranchTarget - 1;
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}
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break;
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case OPCODE_BRK: /* break out of loop (conditional) */
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ASSERT(program->Instructions[inst->BranchTarget].Opcode
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== OPCODE_ENDLOOP);
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@@ -1367,43 +1343,6 @@ _mesa_execute_program(struct gl_context * ctx,
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store_vector4(inst, machine, result);
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}
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break;
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case OPCODE_RCC: /* clamped riciprocal */
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{
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const float largest = 1.884467e+19, smallest = 5.42101e-20;
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GLfloat a[4], r, result[4];
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fetch_vector1(&inst->SrcReg[0], machine, a);
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if (DEBUG_PROG) {
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if (a[0] == 0)
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printf("RCC(0)\n");
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else if (IS_INF_OR_NAN(a[0]))
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printf("RCC(inf)\n");
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}
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if (a[0] == 1.0F) {
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r = 1.0F;
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}
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else {
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r = 1.0F / a[0];
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}
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if (positive(r)) {
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if (r > largest) {
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r = largest;
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}
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else if (r < smallest) {
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r = smallest;
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}
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}
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else {
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if (r < -largest) {
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r = -largest;
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}
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else if (r > -smallest) {
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r = -smallest;
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}
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}
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result[0] = result[1] = result[2] = result[3] = r;
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store_vector4(inst, machine, result);
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}
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break;
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case OPCODE_RCP:
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{
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@@ -154,13 +154,9 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
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{ OPCODE_ABS, "ABS", 1, 1 },
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{ OPCODE_ADD, "ADD", 2, 1 },
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{ OPCODE_AND, "AND", 2, 1 },
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{ OPCODE_ARA, "ARA", 1, 1 },
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{ OPCODE_ARL, "ARL", 1, 1 },
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{ OPCODE_ARL_NV, "ARL_NV", 1, 1 },
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{ OPCODE_ARR, "ARL", 1, 1 },
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{ OPCODE_BGNLOOP,"BGNLOOP", 0, 0 },
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{ OPCODE_BGNSUB, "BGNSUB", 0, 0 },
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{ OPCODE_BRA, "BRA", 0, 0 },
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{ OPCODE_BRK, "BRK", 0, 0 },
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{ OPCODE_CAL, "CAL", 0, 0 },
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{ OPCODE_CMP, "CMP", 3, 1 },
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@@ -210,10 +206,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
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{ OPCODE_PK4B, "PK4B", 1, 1 },
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{ OPCODE_PK4UB, "PK4UB", 1, 1 },
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{ OPCODE_POW, "POW", 2, 1 },
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{ OPCODE_POPA, "POPA", 0, 0 },
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{ OPCODE_PRINT, "PRINT", 1, 0 },
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{ OPCODE_PUSHA, "PUSHA", 0, 0 },
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{ OPCODE_RCC, "RCC", 1, 1 },
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{ OPCODE_RCP, "RCP", 1, 1 },
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{ OPCODE_RET, "RET", 0, 0 },
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{ OPCODE_RFL, "RFL", 1, 1 },
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@@ -148,13 +148,9 @@ typedef enum prog_opcode {
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OPCODE_ABS, /* X X 1.1 X */
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OPCODE_ADD, /* X X X X X */
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OPCODE_AND, /* */
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OPCODE_ARA, /* 2 */
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OPCODE_ARL, /* X X X */
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OPCODE_ARL_NV, /* 2 */
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OPCODE_ARR, /* 2 */
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OPCODE_BGNLOOP, /* opt */
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OPCODE_BGNSUB, /* opt */
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OPCODE_BRA, /* 2 */
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OPCODE_BRK, /* 2 opt */
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OPCODE_CAL, /* 2 2 opt */
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OPCODE_CMP, /* X X */
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@@ -204,10 +200,7 @@ typedef enum prog_opcode {
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OPCODE_PK4B, /* X */
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OPCODE_PK4UB, /* X */
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OPCODE_POW, /* X X X X */
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OPCODE_POPA, /* 3 */
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OPCODE_PRINT, /* X X */
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OPCODE_PUSHA, /* 3 */
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OPCODE_RCC, /* 1.1 */
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OPCODE_RCP, /* X X X X X */
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OPCODE_RET, /* 2 2 opt */
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OPCODE_RFL, /* X */
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@@ -392,7 +392,6 @@ find_next_use(const struct gl_program *prog,
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switch (inst->Opcode) {
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case OPCODE_BGNLOOP:
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case OPCODE_BGNSUB:
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case OPCODE_BRA:
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case OPCODE_CAL:
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case OPCODE_CONT:
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case OPCODE_IF:
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@@ -439,7 +438,6 @@ _mesa_is_flow_control_opcode(enum prog_opcode opcode)
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switch (opcode) {
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case OPCODE_BGNLOOP:
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case OPCODE_BGNSUB:
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case OPCODE_BRA:
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case OPCODE_CAL:
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case OPCODE_CONT:
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case OPCODE_IF:
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@@ -748,13 +748,6 @@ _mesa_fprint_instruction_opt(FILE *f,
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fprint_src_reg(f, &inst->SrcReg[0], mode, prog);
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fprint_comment(f, inst);
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break;
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case OPCODE_BRA:
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fprintf(f, "BRA %d (%s%s)",
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inst->BranchTarget,
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_mesa_condcode_string(inst->DstReg.CondMask),
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_mesa_swizzle_string(inst->DstReg.CondSwizzle, 0, GL_FALSE));
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fprint_comment(f, inst);
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break;
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case OPCODE_IF:
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if (inst->SrcReg[0].File != PROGRAM_UNDEFINED) {
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/* Use ordinary register */
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