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intel/fs: Fix nir_intrinsic_load_helper_invocation for SIMD32.

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Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Francisco Jerez
2017-01-11 19:55:33 -08:00
committed by Jason Ekstrand
parent 7144247c2c
commit bcbc7d3a17
1 changed files with 9 additions and 5 deletions
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14
src/intel/compiler/brw_fs_nir.cpp
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@@ -185,11 +185,15 @@ emit_system_values_block(nir_block *block, fs_visitor *v)
* masks for 2 and 3) in SIMD16. * masks for 2 and 3) in SIMD16.
*/ */
fs_reg shifted = abld.vgrf(BRW_REGISTER_TYPE_UW, 1); fs_reg shifted = abld.vgrf(BRW_REGISTER_TYPE_UW, 1);
abld.SHR(shifted,
stride(byte_offset(retype(brw_vec1_grf(1, 0), for (unsigned i = 0; i < DIV_ROUND_UP(v->dispatch_width, 16); i++) {
BRW_REGISTER_TYPE_UB), 28), const fs_builder hbld = abld.group(MIN2(16, v->dispatch_width), i);
1, 8, 0), hbld.SHR(offset(shifted, hbld, i),
brw_imm_v(0x76543210)); stride(retype(brw_vec1_grf(1 + i, 7),
BRW_REGISTER_TYPE_UB),
1, 8, 0),
brw_imm_v(0x76543210));
}
/* A set bit in the pixel mask means the channel is enabled, but /* A set bit in the pixel mask means the channel is enabled, but
* that is the opposite of gl_HelperInvocation so we need to invert * that is the opposite of gl_HelperInvocation so we need to invert