diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c
index 82294fd55d0..d0ddef6e670 100644
--- a/src/gallium/drivers/radeonsi/si_compute_blit.c
+++ b/src/gallium/drivers/radeonsi/si_compute_blit.c
@@ -1052,8 +1052,9 @@ bool si_compute_blit(struct si_context *sctx, const struct pipe_blit_info *info,
 
    /* MSAA image stores don't work on <= Gfx10.3. It's an issue with FMASK because
     * AMD_DEBUG=nofmask fixes them. EQAA image stores are also unimplemented.
+    * MSAA image stores work fine on Gfx11 (it has neither FMASK nor EQAA).
     */
-   if (dst_samples > 1)
+   if (sctx->gfx_level < GFX11 && !(sctx->screen->debug_flags & DBG(NO_FMASK)) && dst_samples > 1)
       return false;
 
    if (info->dst.format == PIPE_FORMAT_A8R8_UNORM || /* This format fails AMD_TEST=imagecopy. */
diff --git a/src/gallium/drivers/radeonsi/si_shaderlib_nir.c b/src/gallium/drivers/radeonsi/si_shaderlib_nir.c
index 1f96eece782..198df1298ed 100644
--- a/src/gallium/drivers/radeonsi/si_shaderlib_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shaderlib_nir.c
@@ -397,8 +397,6 @@ static nir_def *apply_blit_output_modifiers(nir_builder *b, nir_def *color,
  * - Out-of-bounds src coordinates are clamped by emulating CLAMP_TO_EDGE using
  *   the image_size NIR intrinsic.
  * - X/Y flipping just does this in the shader: -threadIDs - 1
- * - MSAA copies are implemented but disabled because MSAA image stores don't
- *   work.
  */
 void *si_create_blit_cs(struct si_context *sctx, const union si_compute_blit_shader_key *options)
 {