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radeonsi/gfx12: fill missing dcc tiling info

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Display DCC support has been enabled in 0bb83a4060 but this TODO
was forgotten.
Now that the kernel is fixed, we can set the related fields.

Fixes: 0bb83a4060 ("ac/surface: finish display DCC for gfx12")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31683>
This commit is contained in:
Pierre-Eric Pelloux-Prayer
2024-10-14 13:08:36 +02:00
parent a5a5a50ae8
commit bb08596645
1 changed files with 4 additions and 4 deletions
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8
src/gallium/drivers/radeonsi/si_texture.c
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@@ -226,11 +226,11 @@ static int si_init_surface(struct si_screen *sscreen, struct radeon_surf *surfac
flags |= RADEON_SURF_NO_HTILE;
}
/* TODO: Set these for scanout after display DCC is enabled. The reason these are not set is
* because they overlap DCC_OFFSET_256B and the kernel driver incorrectly reads DCC_OFFSET_256B
* on GFX12, which completely breaks the display code.
/* The kernel code translating tiling flags into a modifier was wrong
* until .58, so don't set these attributes for older versions.
*/
if (!is_imported && !(ptex->bind & PIPE_BIND_SCANOUT)) {
bool supports_display_dcc = sscreen->info.drm_minor >= 58;
if (!is_imported && (!(ptex->bind & PIPE_BIND_SCANOUT) || supports_display_dcc)) {
enum pipe_format format = util_format_get_depth_only(ptex->format);
/* These should be set for both color and Z/S. */