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i965: Don't set the swizzle on an immediate value in the VS.

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Fixes glsl-vs-if-nested (70.0 is not <= 70.000648 thanks to the
swizzle bits getting set).  Some safety checks are added to make sure
this doesn't happen again as we increase the usage of immediate values
in program generation.
This commit is contained in:
Eric Anholt
2010-08-18 21:18:23 -07:00
parent af2ef53a27
commit bad29dc6da
2 changed files with 11 additions and 4 deletions
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4
src/mesa/drivers/dri/i965/brw_eu.h
View File

@@ -633,6 +633,8 @@ static INLINE struct brw_reg brw_swizzle( struct brw_reg reg,
GLuint z,
GLuint w)
{
assert(reg.file != BRW_IMMEDIATE_VALUE);
reg.dw1.bits.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(reg.dw1.bits.swizzle, x),
BRW_GET_SWZ(reg.dw1.bits.swizzle, y),
BRW_GET_SWZ(reg.dw1.bits.swizzle, z),
@@ -650,6 +652,7 @@ static INLINE struct brw_reg brw_swizzle1( struct brw_reg reg,
static INLINE struct brw_reg brw_writemask( struct brw_reg reg,
GLuint mask )
{
assert(reg.file != BRW_IMMEDIATE_VALUE);
reg.dw1.bits.writemask &= mask;
return reg;
}
@@ -657,6 +660,7 @@ static INLINE struct brw_reg brw_writemask( struct brw_reg reg,
static INLINE struct brw_reg brw_set_writemask( struct brw_reg reg,
GLuint mask )
{
assert(reg.file != BRW_IMMEDIATE_VALUE);
reg.dw1.bits.writemask = mask;
return reg;
}

3
src/mesa/drivers/dri/i965/brw_vs_emit.c
View File

@@ -1180,10 +1180,12 @@ static struct brw_reg get_arg( struct brw_vs_compile *c,
/* Convert 3-bit swizzle to 2-bit.
*/
if (reg.file != BRW_IMMEDIATE_VALUE) {
reg.dw1.bits.swizzle = BRW_SWIZZLE4(GET_SWZ(src->Swizzle, 0),
GET_SWZ(src->Swizzle, 1),
GET_SWZ(src->Swizzle, 2),
GET_SWZ(src->Swizzle, 3));
}
/* Note this is ok for non-swizzle instructions:
*/
@@ -1229,6 +1231,7 @@ static struct brw_reg get_dst( struct brw_vs_compile *c,
reg = brw_null_reg();
}
assert(reg.type != BRW_IMMEDIATE_VALUE);
reg.dw1.bits.writemask = dst.WriteMask;
return reg;