anv: disable preemption for 3DPRIMITIVE during streamout
This is required by Wa_16013994831. Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20438>
This commit is contained in:
@@ -50,6 +50,7 @@ anv_cmd_state_init(struct anv_cmd_buffer *cmd_buffer)
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state->current_pipeline = UINT32_MAX;
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state->current_pipeline = UINT32_MAX;
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state->gfx.restart_index = UINT32_MAX;
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state->gfx.restart_index = UINT32_MAX;
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state->gfx.object_preemption = true;
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state->gfx.dirty = 0;
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state->gfx.dirty = 0;
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}
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}
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@@ -192,3 +192,9 @@ genX(ray_tracing_pipeline_emit)(struct anv_ray_tracing_pipeline *pipeline);
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.KernelStartPointer = bin->kernel.offset, \
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.KernelStartPointer = bin->kernel.offset, \
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}; \
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}; \
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})
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})
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void
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genX(batch_set_preemption)(struct anv_batch *batch, bool value);
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void
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genX(cmd_buffer_set_preemption)(struct anv_cmd_buffer *cmd_buffer, bool value);
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@@ -2569,6 +2569,8 @@ struct anv_cmd_graphics_state {
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uint32_t index_offset;
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uint32_t index_offset;
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struct vk_sample_locations_state sample_locations;
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struct vk_sample_locations_state sample_locations;
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bool object_preemption;
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};
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};
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enum anv_depth_reg_mode {
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enum anv_depth_reg_mode {
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@@ -3100,6 +3102,7 @@ struct anv_graphics_pipeline {
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bool kill_pixel;
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bool kill_pixel;
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bool force_fragment_thread_dispatch;
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bool force_fragment_thread_dispatch;
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bool uses_xfb;
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uint32_t vb_used;
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uint32_t vb_used;
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struct anv_pipeline_vertex_binding {
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struct anv_pipeline_vertex_binding {
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@@ -370,6 +370,10 @@ genX(blorp_exec)(struct blorp_batch *batch,
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{
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{
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struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
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struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
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/* Turn on preemption if it was toggled off. */
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if (!cmd_buffer->state.gfx.object_preemption)
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genX(cmd_buffer_set_preemption)(cmd_buffer, true);
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if (!cmd_buffer->state.current_l3_config) {
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if (!cmd_buffer->state.current_l3_config) {
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const struct intel_l3_config *cfg =
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const struct intel_l3_config *cfg =
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intel_get_default_l3_config(cmd_buffer->device->info);
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intel_get_default_l3_config(cmd_buffer->device->info);
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@@ -3138,6 +3138,62 @@ cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer)
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}
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}
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}
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}
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/* Set preemption on/off. */
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void
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genX(batch_set_preemption)(struct anv_batch *batch, bool value)
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{
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#if GFX_VERx10 >= 120
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anv_batch_write_reg(batch, GENX(CS_CHICKEN1), cc1) {
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cc1.DisablePreemptionandHighPriorityPausingdueto3DPRIMITIVECommand = !value;
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cc1.DisablePreemptionandHighPriorityPausingdueto3DPRIMITIVECommandMask = true;
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}
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/* Wa_16013994831 - we need to insert CS_STALL and 250 noops. */
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anv_batch_emit(batch, GENX(PIPE_CONTROL), pipe) {
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pipe.CommandStreamerStallEnable = true;
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}
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for (unsigned i = 0; i < 250; i++)
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anv_batch_emit(batch, GENX(MI_NOOP), noop);
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#endif
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}
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void
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genX(cmd_buffer_set_preemption)(struct anv_cmd_buffer *cmd_buffer, bool value)
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{
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#if GFX_VERx10 >= 120
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if (cmd_buffer->state.gfx.object_preemption == value)
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return;
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genX(batch_set_preemption)(&cmd_buffer->batch, value);
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cmd_buffer->state.gfx.object_preemption = value;
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#endif
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}
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static void
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genX(streamout_prologue)(struct anv_cmd_buffer *cmd_buffer)
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{
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#if GFX_VERx10 >= 120
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/* Wa_16013994831 - Disable preemption during streamout, enable back
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* again if XFB not used by the current pipeline.
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*
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* Although this workaround applies to Gfx12+, we already disable object
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* level preemption for another reason in genX_state.c so we can skip this
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* for Gfx12.
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*/
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if (!intel_device_info_is_dg2(cmd_buffer->device->info))
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return;
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if (cmd_buffer->state.gfx.pipeline->uses_xfb) {
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genX(cmd_buffer_set_preemption)(cmd_buffer, false);
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return;
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}
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if (!cmd_buffer->state.gfx.object_preemption)
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genX(cmd_buffer_set_preemption)(cmd_buffer, true);
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#endif
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}
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static void
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static void
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cmd_buffer_emit_streamout(struct anv_cmd_buffer *cmd_buffer)
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cmd_buffer_emit_streamout(struct anv_cmd_buffer *cmd_buffer)
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{
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{
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@@ -3166,6 +3222,8 @@ cmd_buffer_emit_streamout(struct anv_cmd_buffer *cmd_buffer)
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unreachable("Invalid provoking vertex mode");
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unreachable("Invalid provoking vertex mode");
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}
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}
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genX(streamout_prologue)(cmd_buffer);
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GENX(3DSTATE_STREAMOUT_pack)(NULL, dwords, &so);
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GENX(3DSTATE_STREAMOUT_pack)(NULL, dwords, &so);
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anv_batch_emit_merge(&cmd_buffer->batch, dwords, pipeline->gfx8.streamout_state);
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anv_batch_emit_merge(&cmd_buffer->batch, dwords, pipeline->gfx8.streamout_state);
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}
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}
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@@ -3627,6 +3685,12 @@ genX(EndCommandBuffer)(
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genX(cmd_buffer_flush_generated_draws)(cmd_buffer);
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genX(cmd_buffer_flush_generated_draws)(cmd_buffer);
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#endif
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#endif
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/* Turn on object level preemption if it is disabled to have it in known
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* state at the beginning of new command buffer.
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*/
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if (!cmd_buffer->state.gfx.object_preemption)
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genX(cmd_buffer_set_preemption)(cmd_buffer, true);
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/* We want every command buffer to start with the PMA fix in a known state,
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/* We want every command buffer to start with the PMA fix in a known state,
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* so we disable it at the end of the command buffer.
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* so we disable it at the end of the command buffer.
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*/
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*/
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@@ -3661,6 +3725,10 @@ genX(CmdExecuteCommands)(
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*/
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*/
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genX(cmd_buffer_enable_pma_fix)(primary, false);
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genX(cmd_buffer_enable_pma_fix)(primary, false);
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/* Turn on preemption in case it was toggled off. */
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if (!primary->state.gfx.object_preemption)
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genX(cmd_buffer_set_preemption)(primary, true);
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/* The secondary command buffer doesn't know which textures etc. have been
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/* The secondary command buffer doesn't know which textures etc. have been
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* flushed prior to their execution. Apply those flushes now.
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* flushed prior to their execution. Apply those flushes now.
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*/
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*/
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@@ -80,6 +80,10 @@ emit_common_so_memcpy(struct anv_batch *batch, struct anv_device *device,
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anv_batch_emit(batch, GENX(3DSTATE_MESH_CONTROL), mesh);
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anv_batch_emit(batch, GENX(3DSTATE_MESH_CONTROL), mesh);
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anv_batch_emit(batch, GENX(3DSTATE_TASK_CONTROL), task);
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anv_batch_emit(batch, GENX(3DSTATE_TASK_CONTROL), task);
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}
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}
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/* Wa_16013994831 - Disable preemption during streamout. */
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if (intel_device_info_is_dg2(device->info))
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genX(batch_set_preemption)(batch, false);
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#endif
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#endif
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anv_batch_emit(batch, GENX(3DSTATE_SBE), sbe) {
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anv_batch_emit(batch, GENX(3DSTATE_SBE), sbe) {
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@@ -259,6 +263,9 @@ genX(emit_so_memcpy_fini)(struct anv_memcpy_state *state)
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if ((state->batch->next - state->batch->start) & 4)
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if ((state->batch->next - state->batch->start) & 4)
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anv_batch_emit(state->batch, GENX(MI_NOOP), noop);
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anv_batch_emit(state->batch, GENX(MI_NOOP), noop);
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if (intel_device_info_is_dg2(state->device->info))
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genX(batch_set_preemption)(state->batch, true);
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}
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}
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void
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void
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@@ -1115,6 +1115,8 @@ emit_3dstate_streamout(struct anv_graphics_pipeline *pipeline,
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};
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};
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if (xfb_info) {
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if (xfb_info) {
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pipeline->uses_xfb = true;
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so.SOFunctionEnable = true;
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so.SOFunctionEnable = true;
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so.SOStatisticsEnable = true;
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so.SOStatisticsEnable = true;
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