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radv: don't use the SPI barrier management bug workaround

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Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset
2018-04-04 10:55:43 +02:00
parent ab147cba77
commit b8c06a961c
1 changed files with 5 additions and 0 deletions
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5
src/amd/vulkan/radv_pipeline.c
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@@ -1274,6 +1274,11 @@ calculate_gs_ring_sizes(struct radv_pipeline *pipeline, const struct radv_gs_sta
static void si_multiwave_lds_size_workaround(struct radv_device *device,
unsigned *lds_size)
{
/* If tessellation is all offchip and on-chip GS isn't used, this
* workaround is not needed.
*/
return;
/* SPI barrier management bug:
* Make sure we have at least 4k of LDS in use to avoid the bug.
* It applies to workgroup sizes of more than one wavefront.