r600/sfn: Stop referencing legacy functionality

It's unused now, just need the references to it dropped so we'll still build
when it's all removed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24471>
This commit is contained in:
Alyssa Rosenzweig
2023-08-01 14:05:43 -04:00
committed by Marge Bot
parent c545df7426
commit b870988b77
6 changed files with 14 additions and 52 deletions

View File

@@ -1903,9 +1903,7 @@ AluInstr::from_nir(nir_alu_instr *alu, Shader& shader)
static Pin
pin_for_components(const nir_alu_instr& alu)
{
return (alu.dest.dest.is_ssa && (nir_dest_num_components(alu.dest.dest) == 1))
? pin_free
: pin_none;
return nir_dest_num_components(alu.dest.dest) == 1 ? pin_free : pin_none;
}
static bool
@@ -2581,11 +2579,6 @@ emit_any_all_fcomp(const nir_alu_instr& alu, EAluOp op, int nc, bool all, Shader
static bool
emit_any_all_icomp(const nir_alu_instr& alu, EAluOp op, int nc, bool all, Shader& shader)
{
assert(!alu.src[0].abs);
assert(!alu.src[0].negate);
assert(!alu.src[1].abs);
assert(!alu.src[1].negate);
/* This should probabyl be lowered in nir */
auto& value_factory = shader.value_factory();

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@@ -192,7 +192,7 @@ bool
GDSInstr::emit_atomic_op2(nir_intrinsic_instr *instr, Shader& shader)
{
auto& vf = shader.value_factory();
bool read_result = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
bool read_result = !list_is_empty(&instr->dest.ssa.uses);
ESDOp op =
read_result ? get_opcode(instr->intrinsic) : get_opcode_wo(instr->intrinsic);
@@ -287,7 +287,7 @@ bool
GDSInstr::emit_atomic_inc(nir_intrinsic_instr *instr, Shader& shader)
{
auto& vf = shader.value_factory();
bool read_result = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
bool read_result = !list_is_empty(&instr->dest.ssa.uses);
auto [offset, uav_id] = shader.evaluate_resource_offset(instr, 0);
{
@@ -328,7 +328,7 @@ GDSInstr::emit_atomic_pre_dec(nir_intrinsic_instr *instr, Shader& shader)
{
auto& vf = shader.value_factory();
bool read_result = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
bool read_result = !list_is_empty(&instr->dest.ssa.uses);
auto opcode = read_result ? DS_OP_SUB_RET : DS_OP_SUB;
@@ -663,7 +663,7 @@ RatInstr::emit_ssbo_atomic_op(nir_intrinsic_instr *intr, Shader& shader)
{
}
bool read_result = !intr->dest.is_ssa || !list_is_empty(&intr->dest.ssa.uses);
bool read_result = !list_is_empty(&intr->dest.ssa.uses);
auto opcode = read_result ? get_rat_opcode(nir_intrinsic_atomic_op(intr))
: get_rat_opcode_wo(nir_intrinsic_atomic_op(intr));
@@ -800,7 +800,7 @@ RatInstr::emit_image_load_or_atomic(nir_intrinsic_instr *intrin, Shader& shader)
{
}
bool read_result = !intrin->dest.is_ssa || !list_is_empty(&intrin->dest.ssa.uses);
bool read_result = !list_is_empty(&intrin->dest.ssa.uses);
bool image_load = (intrin->intrinsic == nir_intrinsic_image_load);
auto opcode = image_load ? RatInstr::NOP_RTN :
read_result ? get_rat_opcode(nir_intrinsic_atomic_op(intrin))

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@@ -676,23 +676,6 @@ optimize_once(nir_shader *shader)
return progress;
}
bool
has_saturate(const nir_function *func)
{
nir_foreach_block(block, func->impl)
{
nir_foreach_instr(instr, block)
{
if (instr->type == nir_instr_type_alu) {
auto alu = nir_instr_as_alu(instr);
if (alu->dest.saturate)
return true;
}
}
}
return false;
}
static bool
r600_is_last_vertex_stage(nir_shader *nir, const r600_shader_key& key)
{

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@@ -1100,7 +1100,7 @@ void RegisterWriteHandler::visit(Register& dest)
bool
Shader::emit_atomic_local_shared(nir_intrinsic_instr *instr)
{
bool uses_retval = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
bool uses_retval = !list_is_empty(&instr->dest.ssa.uses);
auto& vf = value_factory();
@@ -1560,7 +1560,7 @@ Shader::load_ubo(nir_intrinsic_instr *instr)
int buf_cmp = nir_intrinsic_component(instr);
AluInstr *ir = nullptr;
auto pin = instr->dest.is_ssa && nir_dest_num_components(instr->dest) == 1
auto pin = nir_dest_num_components(instr->dest) == 1
? pin_free
: pin_none;
for (unsigned i = 0; i < nir_dest_num_components(instr->dest); ++i) {

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@@ -689,17 +689,9 @@ FragmentShaderR600::load_input_hw(nir_intrinsic_instr *intr)
<< *m_interpolated_inputs[nir_intrinsic_base(intr)][i] << "\n";
unsigned index = nir_intrinsic_component(intr) + i;
assert(index < 4);
if (intr->dest.is_ssa) {
vf.inject_value(intr->dest,
i,
m_interpolated_inputs[nir_intrinsic_base(intr)][index]);
} else {
ir = new AluInstr(op1_mov,
vf.dest(intr->dest, i, pin_none),
m_interpolated_inputs[nir_intrinsic_base(intr)][index],
AluInstr::write);
emit_instruction(ir);
}
vf.inject_value(intr->dest,
i,
m_interpolated_inputs[nir_intrinsic_base(intr)][index]);
}
if (ir)
ir->set_alu_flag(alu_last_instr);
@@ -732,7 +724,7 @@ FragmentShaderEG::load_input_hw(nir_intrinsic_instr *intr)
auto io = input(nir_intrinsic_base(intr));
auto comp = nir_intrinsic_component(intr);
bool need_temp = comp > 0 || !intr->dest.is_ssa;
bool need_temp = comp > 0;
AluInstr *ir = nullptr;
for (unsigned i = 0; i < nir_dest_num_components(intr->dest); ++i) {
if (need_temp) {
@@ -816,7 +808,7 @@ FragmentShaderEG::load_interpolated_input_hw(nir_intrinsic_instr *intr)
int dest_num_comp = nir_dest_num_components(intr->dest);
int start_comp = nir_intrinsic_component(intr);
bool need_temp = start_comp > 0 || !intr->dest.is_ssa;
bool need_temp = start_comp > 0;
auto dst = need_temp ? vf.temp_vec4(pin_chan) : vf.dest_vec4(intr->dest, pin_chan);

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@@ -505,13 +505,7 @@ VertexShader::load_input(nir_intrinsic_instr *intr)
for (unsigned i = 0; i < nir_dest_num_components(intr->dest); ++i) {
auto src = vf.allocate_pinned_register(driver_location + 1, i);
src->set_flag(Register::ssa);
if (intr->dest.is_ssa)
vf.inject_value(intr->dest, i, src);
else {
ir =
new AluInstr(op1_mov, vf.dest(intr->dest, i, pin_none), src, {alu_write});
emit_instruction(ir);
}
vf.inject_value(intr->dest, i, src);
}
if (ir)
ir->set_alu_flag(alu_last_instr);