r600/sfn: Stop referencing legacy functionality
It's unused now, just need the references to it dropped so we'll still build when it's all removed. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24471>
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@@ -1903,9 +1903,7 @@ AluInstr::from_nir(nir_alu_instr *alu, Shader& shader)
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static Pin
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pin_for_components(const nir_alu_instr& alu)
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{
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return (alu.dest.dest.is_ssa && (nir_dest_num_components(alu.dest.dest) == 1))
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? pin_free
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: pin_none;
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return nir_dest_num_components(alu.dest.dest) == 1 ? pin_free : pin_none;
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}
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static bool
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@@ -2581,11 +2579,6 @@ emit_any_all_fcomp(const nir_alu_instr& alu, EAluOp op, int nc, bool all, Shader
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static bool
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emit_any_all_icomp(const nir_alu_instr& alu, EAluOp op, int nc, bool all, Shader& shader)
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{
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assert(!alu.src[0].abs);
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assert(!alu.src[0].negate);
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assert(!alu.src[1].abs);
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assert(!alu.src[1].negate);
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/* This should probabyl be lowered in nir */
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auto& value_factory = shader.value_factory();
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@@ -192,7 +192,7 @@ bool
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GDSInstr::emit_atomic_op2(nir_intrinsic_instr *instr, Shader& shader)
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{
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auto& vf = shader.value_factory();
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bool read_result = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
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bool read_result = !list_is_empty(&instr->dest.ssa.uses);
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ESDOp op =
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read_result ? get_opcode(instr->intrinsic) : get_opcode_wo(instr->intrinsic);
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@@ -287,7 +287,7 @@ bool
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GDSInstr::emit_atomic_inc(nir_intrinsic_instr *instr, Shader& shader)
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{
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auto& vf = shader.value_factory();
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bool read_result = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
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bool read_result = !list_is_empty(&instr->dest.ssa.uses);
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auto [offset, uav_id] = shader.evaluate_resource_offset(instr, 0);
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{
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@@ -328,7 +328,7 @@ GDSInstr::emit_atomic_pre_dec(nir_intrinsic_instr *instr, Shader& shader)
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{
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auto& vf = shader.value_factory();
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bool read_result = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
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bool read_result = !list_is_empty(&instr->dest.ssa.uses);
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auto opcode = read_result ? DS_OP_SUB_RET : DS_OP_SUB;
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@@ -663,7 +663,7 @@ RatInstr::emit_ssbo_atomic_op(nir_intrinsic_instr *intr, Shader& shader)
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{
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}
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bool read_result = !intr->dest.is_ssa || !list_is_empty(&intr->dest.ssa.uses);
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bool read_result = !list_is_empty(&intr->dest.ssa.uses);
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auto opcode = read_result ? get_rat_opcode(nir_intrinsic_atomic_op(intr))
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: get_rat_opcode_wo(nir_intrinsic_atomic_op(intr));
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@@ -800,7 +800,7 @@ RatInstr::emit_image_load_or_atomic(nir_intrinsic_instr *intrin, Shader& shader)
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{
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}
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bool read_result = !intrin->dest.is_ssa || !list_is_empty(&intrin->dest.ssa.uses);
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bool read_result = !list_is_empty(&intrin->dest.ssa.uses);
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bool image_load = (intrin->intrinsic == nir_intrinsic_image_load);
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auto opcode = image_load ? RatInstr::NOP_RTN :
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read_result ? get_rat_opcode(nir_intrinsic_atomic_op(intrin))
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@@ -676,23 +676,6 @@ optimize_once(nir_shader *shader)
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return progress;
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}
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bool
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has_saturate(const nir_function *func)
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{
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nir_foreach_block(block, func->impl)
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{
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nir_foreach_instr(instr, block)
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{
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if (instr->type == nir_instr_type_alu) {
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auto alu = nir_instr_as_alu(instr);
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if (alu->dest.saturate)
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return true;
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}
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}
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}
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return false;
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}
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static bool
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r600_is_last_vertex_stage(nir_shader *nir, const r600_shader_key& key)
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{
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@@ -1100,7 +1100,7 @@ void RegisterWriteHandler::visit(Register& dest)
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bool
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Shader::emit_atomic_local_shared(nir_intrinsic_instr *instr)
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{
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bool uses_retval = !instr->dest.is_ssa || !list_is_empty(&instr->dest.ssa.uses);
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bool uses_retval = !list_is_empty(&instr->dest.ssa.uses);
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auto& vf = value_factory();
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@@ -1560,7 +1560,7 @@ Shader::load_ubo(nir_intrinsic_instr *instr)
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int buf_cmp = nir_intrinsic_component(instr);
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AluInstr *ir = nullptr;
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auto pin = instr->dest.is_ssa && nir_dest_num_components(instr->dest) == 1
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auto pin = nir_dest_num_components(instr->dest) == 1
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? pin_free
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: pin_none;
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for (unsigned i = 0; i < nir_dest_num_components(instr->dest); ++i) {
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@@ -689,17 +689,9 @@ FragmentShaderR600::load_input_hw(nir_intrinsic_instr *intr)
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<< *m_interpolated_inputs[nir_intrinsic_base(intr)][i] << "\n";
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unsigned index = nir_intrinsic_component(intr) + i;
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assert(index < 4);
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if (intr->dest.is_ssa) {
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vf.inject_value(intr->dest,
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i,
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m_interpolated_inputs[nir_intrinsic_base(intr)][index]);
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} else {
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ir = new AluInstr(op1_mov,
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vf.dest(intr->dest, i, pin_none),
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m_interpolated_inputs[nir_intrinsic_base(intr)][index],
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AluInstr::write);
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emit_instruction(ir);
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}
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vf.inject_value(intr->dest,
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i,
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m_interpolated_inputs[nir_intrinsic_base(intr)][index]);
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}
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if (ir)
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ir->set_alu_flag(alu_last_instr);
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@@ -732,7 +724,7 @@ FragmentShaderEG::load_input_hw(nir_intrinsic_instr *intr)
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auto io = input(nir_intrinsic_base(intr));
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auto comp = nir_intrinsic_component(intr);
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bool need_temp = comp > 0 || !intr->dest.is_ssa;
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bool need_temp = comp > 0;
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AluInstr *ir = nullptr;
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for (unsigned i = 0; i < nir_dest_num_components(intr->dest); ++i) {
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if (need_temp) {
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@@ -816,7 +808,7 @@ FragmentShaderEG::load_interpolated_input_hw(nir_intrinsic_instr *intr)
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int dest_num_comp = nir_dest_num_components(intr->dest);
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int start_comp = nir_intrinsic_component(intr);
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bool need_temp = start_comp > 0 || !intr->dest.is_ssa;
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bool need_temp = start_comp > 0;
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auto dst = need_temp ? vf.temp_vec4(pin_chan) : vf.dest_vec4(intr->dest, pin_chan);
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@@ -505,13 +505,7 @@ VertexShader::load_input(nir_intrinsic_instr *intr)
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for (unsigned i = 0; i < nir_dest_num_components(intr->dest); ++i) {
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auto src = vf.allocate_pinned_register(driver_location + 1, i);
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src->set_flag(Register::ssa);
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if (intr->dest.is_ssa)
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vf.inject_value(intr->dest, i, src);
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else {
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ir =
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new AluInstr(op1_mov, vf.dest(intr->dest, i, pin_none), src, {alu_write});
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emit_instruction(ir);
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}
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vf.inject_value(intr->dest, i, src);
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}
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if (ir)
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ir->set_alu_flag(alu_last_instr);
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