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intel/eu/gfx12+: Implement decoding of 64-bit immediates.

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C.f. a12533f2ce.  The corresponding
change for the decoding path was never implemented so the disassembler
was printing incorrect immediate values.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20543>
This commit is contained in:
Francisco Jerez
2023-01-04 12:53:35 -08:00
committed by Marge Bot
parent f80f29dc4b
commit b867d1b851
1 changed files with 9 additions and 5 deletions
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14
src/intel/compiler/brw_inst.h
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@@ -1069,11 +1069,16 @@ brw_inst_imm_ud(const struct intel_device_info *devinfo, const brw_inst *insn)
}
static inline uint64_t
brw_inst_imm_uq(ASSERTED const struct intel_device_info *devinfo,
brw_inst_imm_uq(const struct intel_device_info *devinfo,
const brw_inst *insn)
{
assert(devinfo->ver >= 8);
return brw_inst_bits(insn, 127, 64);
if (devinfo->ver >= 12) {
return brw_inst_bits(insn, 95, 64) << 32 |
brw_inst_bits(insn, 127, 96);
} else {
assert(devinfo->ver >= 8);
return brw_inst_bits(insn, 127, 64);
}
}
static inline float
@@ -1095,8 +1100,7 @@ brw_inst_imm_df(const struct intel_device_info *devinfo, const brw_inst *insn)
double d;
uint64_t u;
} dt;
(void) devinfo;
dt.u = brw_inst_bits(insn, 127, 64);
dt.u = brw_inst_imm_uq(devinfo, insn);
return dt.d;
}