radv: make sure to set CB_SHADER_MASK correctly for internal CB operations
It should be always set to 0xf. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5427>
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@@ -5119,6 +5119,17 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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blend.spi_shader_col_format = V_028714_SPI_SHADER_32_R;
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blend.spi_shader_col_format = V_028714_SPI_SHADER_32_R;
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}
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}
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if (extra &&
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(extra->custom_blend_mode == V_028808_CB_ELIMINATE_FAST_CLEAR ||
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extra->custom_blend_mode == V_028808_CB_FMASK_DECOMPRESS ||
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extra->custom_blend_mode == V_028808_CB_DCC_DECOMPRESS ||
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extra->custom_blend_mode == V_028808_CB_RESOLVE)) {
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/* According to the CB spec states, CB_SHADER_MASK should be
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* set to enable writes to all four channels of MRT0.
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*/
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blend.cb_shader_mask = 0xf;
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}
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for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
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for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
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if (pipeline->shaders[i]) {
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if (pipeline->shaders[i]) {
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pipeline->need_indirect_descriptor_sets |= pipeline->shaders[i]->info.need_indirect_descriptor_sets;
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pipeline->need_indirect_descriptor_sets |= pipeline->shaders[i]->info.need_indirect_descriptor_sets;
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