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radeonsi,driconf: add clamp_div_by_zero option

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Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6259>
This commit is contained in:
Pierre-Eric Pelloux-Prayer
2020-08-13 11:15:36 +02:00
parent 32f46a55c8
commit b8445520cb
4 changed files with 7 additions and 3 deletions
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1
src/gallium/drivers/radeonsi/si_debug_options.h
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@@ -8,5 +8,6 @@ OPT_BOOL(vs_fetch_always_opencode, false,
"Always open code vertex fetches (less efficient, purely for testing)")
OPT_BOOL(prim_restart_tri_strips_only, false, "Only enable primitive restart for triangle strips")
OPT_BOOL(no_infinite_interp, false, "Kill PS with infinite interp coeff")
OPT_BOOL(clamp_div_by_zero, false, "Clamp div by zero (x / 0 becomes FLT_MAX instead of NaN)")
#undef OPT_BOOL

7
src/gallium/drivers/radeonsi/si_pipe.c
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@@ -907,7 +907,7 @@ static void si_disk_cache_create(struct si_screen *sscreen)
disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
/* These flags affect shader compilation. */
#define ALL_FLAGS (DBG(GISEL) | DBG(KILL_PS_INF_INTERP))
#define ALL_FLAGS (DBG(GISEL) | DBG(KILL_PS_INF_INTERP) | DBG(CLAMP_DIV_BY_ZERO))
uint64_t shader_debug_flags = sscreen->debug_flags & ALL_FLAGS;
/* Add the high bits of 32-bit addresses, which affects
@@ -1030,9 +1030,10 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
#include "si_debug_options.h"
}
if (sscreen->options.no_infinite_interp) {
if (sscreen->options.no_infinite_interp)
sscreen->debug_flags |= DBG(KILL_PS_INF_INTERP);
}
if (sscreen->options.clamp_div_by_zero)
sscreen->debug_flags |= DBG(CLAMP_DIV_BY_ZERO);
si_disk_cache_create(sscreen);

1
src/gallium/drivers/radeonsi/si_pipe.h
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@@ -162,6 +162,7 @@ enum
DBG_W64_PS,
DBG_W64_CS,
DBG_KILL_PS_INF_INTERP,
DBG_CLAMP_DIV_BY_ZERO,
/* Shader compiler options (with no effect on the shader cache): */
DBG_CHECK_IR,

1
src/gallium/drivers/radeonsi/si_shader_llvm.c
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@@ -460,6 +460,7 @@ bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir)
ctx->abi.clamp_shadow_reference = true;
ctx->abi.robust_buffer_access = true;
ctx->abi.convert_undef_to_zero = true;
ctx->abi.clamp_div_by_zero = ctx->screen->options.clamp_div_by_zero;
if (ctx->shader->selector->info.properties[TGSI_PROPERTY_CS_LOCAL_SIZE]) {
assert(gl_shader_stage_is_compute(nir->info.stage));