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radv: move to using common record_result.

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v2 (Jason Ekstrand):
 - Handle rename to vk_command_buffer_set_error
 - Add more instances, especially in device generated commands

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16918>
This commit is contained in:
Dave Airlie
2022-06-08 06:11:19 +10:00
committed by Marge Bot
parent cc6ad491ea
commit b644c7ca9f
15 changed files with 40 additions and 47 deletions
Download Patch File Download Diff File Expand all files Collapse all files

41
src/amd/vulkan/radv_cmd_buffer.c
View File

@@ -432,8 +432,6 @@ radv_reset_cmd_buffer(struct radv_cmd_buffer *cmd_buffer)
radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, cmd_buffer->upload.upload_bo);
cmd_buffer->upload.offset = 0;
cmd_buffer->record_result = VK_SUCCESS;
memset(cmd_buffer->vertex_binding_buffers, 0, sizeof(struct radv_buffer *) * cmd_buffer->used_vertex_bindings);
cmd_buffer->used_vertex_bindings = 0;
@@ -447,7 +445,7 @@ radv_reset_cmd_buffer(struct radv_cmd_buffer *cmd_buffer)
uint32_t pred_value = 0;
uint32_t pred_offset;
if (!radv_cmd_buffer_upload_data(cmd_buffer, 4, &pred_value, &pred_offset))
cmd_buffer->record_result = VK_ERROR_OUT_OF_HOST_MEMORY;
vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
cmd_buffer->mec_inv_pred_emitted = false;
cmd_buffer->mec_inv_pred_va = radv_buffer_get_va(cmd_buffer->upload.upload_bo) + pred_offset;
@@ -480,7 +478,7 @@ radv_reset_cmd_buffer(struct radv_cmd_buffer *cmd_buffer)
cmd_buffer->status = RADV_CMD_BUFFER_STATUS_INITIAL;
return cmd_buffer->record_result;
return vk_command_buffer_get_record_result(&cmd_buffer->vk);
}
static bool
@@ -501,7 +499,7 @@ radv_cmd_buffer_resize_upload_buf(struct radv_cmd_buffer *cmd_buffer, uint64_t m
RADV_BO_PRIORITY_UPLOAD_BUFFER, 0, &bo);
if (result != VK_SUCCESS) {
cmd_buffer->record_result = result;
vk_command_buffer_set_error(&cmd_buffer->vk, result);
return false;
}
@@ -510,7 +508,7 @@ radv_cmd_buffer_resize_upload_buf(struct radv_cmd_buffer *cmd_buffer, uint64_t m
upload = malloc(sizeof(*upload));
if (!upload) {
cmd_buffer->record_result = VK_ERROR_OUT_OF_HOST_MEMORY;
vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
device->ws->buffer_destroy(device->ws, bo);
return false;
}
@@ -525,7 +523,7 @@ radv_cmd_buffer_resize_upload_buf(struct radv_cmd_buffer *cmd_buffer, uint64_t m
cmd_buffer->upload.map = device->ws->buffer_map(cmd_buffer->upload.upload_bo);
if (!cmd_buffer->upload.map) {
cmd_buffer->record_result = VK_ERROR_OUT_OF_DEVICE_MEMORY;
vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_DEVICE_MEMORY);
return false;
}
@@ -646,7 +644,7 @@ radv_ace_internal_sem_create(struct radv_cmd_buffer *cmd_buffer)
uint64_t sem_init = 0;
uint32_t va_off = 0;
if (!radv_cmd_buffer_upload_data(cmd_buffer, sizeof(uint64_t), &sem_init, &va_off)) {
cmd_buffer->record_result = VK_ERROR_OUT_OF_HOST_MEMORY;
vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
return 0;
}
@@ -702,9 +700,8 @@ radv_ace_internal_create(struct radv_cmd_buffer *cmd_buffer)
struct radv_device *device = cmd_buffer->device;
struct radeon_cmdbuf *ace_cs = device->ws->cs_create(device->ws, AMD_IP_COMPUTE);
if (!ace_cs) {
cmd_buffer->record_result = VK_ERROR_OUT_OF_HOST_MEMORY;
}
if (!ace_cs)
vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
return ace_cs;
}
@@ -2587,7 +2584,7 @@ radv_cmd_buffer_get_vrs_image(struct radv_cmd_buffer *cmd_buffer)
/* The global VRS state is initialized on-demand to avoid wasting VRAM. */
result = radv_device_init_vrs_state(device);
if (result != VK_SUCCESS) {
cmd_buffer->record_result = result;
vk_command_buffer_set_error(&cmd_buffer->vk, result);
return NULL;
}
}
@@ -3193,7 +3190,7 @@ radv_emit_vertex_input(struct radv_cmd_buffer *cmd_buffer, bool pipeline_is_dirt
struct radv_shader_part *prolog =
lookup_vs_prolog(cmd_buffer, vs_shader, &nontrivial_divisors);
if (!prolog) {
cmd_buffer->record_result = VK_ERROR_OUT_OF_HOST_MEMORY;
vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
return;
}
emit_prolog_regs(cmd_buffer, vs_shader, prolog, pipeline_is_dirty);
@@ -4573,8 +4570,7 @@ radv_cmd_state_setup_sample_locations(struct radv_cmd_buffer *cmd_buffer,
sample_locs->postSubpassSampleLocationsCount * sizeof(state->subpass_sample_locs[0]),
8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
if (state->subpass_sample_locs == NULL) {
cmd_buffer->record_result = VK_ERROR_OUT_OF_HOST_MEMORY;
return cmd_buffer->record_result;
return vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
}
state->num_subpass_sample_locs = sample_locs->postSubpassSampleLocationsCount;
@@ -4618,8 +4614,7 @@ radv_cmd_state_setup_attachments(struct radv_cmd_buffer *cmd_buffer, struct radv
vk_alloc(&cmd_buffer->pool->vk.alloc, pass->attachment_count * sizeof(state->attachments[0]),
8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
if (state->attachments == NULL) {
cmd_buffer->record_result = VK_ERROR_OUT_OF_HOST_MEMORY;
return cmd_buffer->record_result;
return vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
}
for (uint32_t i = 0; i < pass->attachment_count; ++i) {
@@ -4841,7 +4836,7 @@ radv_inherit_dynamic_rendering(struct radv_cmd_buffer *cmd_buffer,
result =
radv_CreateRenderPass2(radv_device_to_handle(cmd_buffer->device), &rp_create_info, NULL, &rp);
if (result != VK_SUCCESS) {
cmd_buffer->record_result = result;
vk_command_buffer_set_error(&cmd_buffer->vk, result);
return;
}
@@ -5151,7 +5146,7 @@ radv_init_push_descriptor_set(struct radv_cmd_buffer *cmd_buffer, struct radv_de
if (!set->header.mapped_ptr) {
descriptors_state->push_set.capacity = 0;
cmd_buffer->record_result = VK_ERROR_OUT_OF_HOST_MEMORY;
vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
return false;
}
@@ -5322,7 +5317,7 @@ radv_EndCommandBuffer(VkCommandBuffer commandBuffer)
cmd_buffer->status = RADV_CMD_BUFFER_STATUS_EXECUTABLE;
return cmd_buffer->record_result;
return vk_command_buffer_get_record_result(&cmd_buffer->vk);
}
static void
@@ -7051,7 +7046,7 @@ radv_emit_indirect_taskmesh_draw_packets(struct radv_cmd_buffer *cmd_buffer,
uint32_t workaround_cond_init = 0;
uint32_t workaround_cond_off;
if (!radv_cmd_buffer_upload_data(cmd_buffer, 4, &workaround_cond_init, &workaround_cond_off))
cmd_buffer->record_result = VK_ERROR_OUT_OF_HOST_MEMORY;
vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
workaround_cond_va = radv_buffer_get_va(cmd_buffer->upload.upload_bo) + workaround_cond_off;
@@ -8955,7 +8950,7 @@ radv_CmdBeginRendering(VkCommandBuffer commandBuffer, const VkRenderingInfo *pRe
result =
radv_CreateRenderPass2(radv_device_to_handle(cmd_buffer->device), &rp_create_info, NULL, &rp);
if (result != VK_SUCCESS) {
cmd_buffer->record_result = result;
vk_command_buffer_set_error(&cmd_buffer->vk, result);
return;
}
@@ -8985,7 +8980,7 @@ radv_CmdBeginRendering(VkCommandBuffer commandBuffer, const VkRenderingInfo *pRe
vk_common_CreateFramebuffer(radv_device_to_handle(cmd_buffer->device), &fb_create_info, NULL, &fb);
if (result != VK_SUCCESS) {
radv_DestroyRenderPass(radv_device_to_handle(cmd_buffer->device), rp, NULL);
cmd_buffer->record_result = result;
vk_command_buffer_set_error(&cmd_buffer->vk, result);
return;
}

2
src/amd/vulkan/radv_device_generated_commands.c
View File

@@ -1157,7 +1157,7 @@ radv_prepare_dgc(struct radv_cmd_buffer *cmd_buffer,
void *upload_data;
unsigned upload_offset;
if (!radv_cmd_buffer_upload_alloc(cmd_buffer, upload_size, &upload_offset, &upload_data)) {
cmd_buffer->record_result = VK_ERROR_OUT_OF_HOST_MEMORY;
vk_command_buffer_set_error(&cmd_buffer->vk, VK_ERROR_OUT_OF_HOST_MEMORY);
return;
}

2
src/amd/vulkan/radv_meta_blit.c
View File

@@ -332,7 +332,7 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
translate_sampler_dim(src_image->vk.image_type),
format, pipeline);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return;
}
}

6
src/amd/vulkan/radv_meta_blit2d.c
View File

@@ -245,7 +245,7 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
VkResult ret = blit2d_init_color_pipeline(
device, src_type, radv_fs_key_format_exemplars[fs_key], log2_samples);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
goto fail_pipeline;
}
}
@@ -277,7 +277,7 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
VK_NULL_HANDLE) {
VkResult ret = blit2d_init_depth_only_pipeline(device, src_type, log2_samples);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
goto fail_pipeline;
}
}
@@ -311,7 +311,7 @@ radv_meta_blit2d_normal_dst(struct radv_cmd_buffer *cmd_buffer,
VK_NULL_HANDLE) {
VkResult ret = blit2d_init_stencil_only_pipeline(device, src_type, log2_samples);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
goto fail_pipeline;
}
}

4
src/amd/vulkan/radv_meta_clear.c
View File

@@ -348,7 +348,7 @@ emit_color_clear(struct radv_cmd_buffer *cmd_buffer, const VkClearAttachment *cl
&device->meta_state.color_clear[samples_log2][clear_att->colorAttachment]
.color_pipelines[fs_key]);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return;
}
}
@@ -552,7 +552,7 @@ pick_depthstencil_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_
VkResult ret = create_depthstencil_pipeline(
cmd_buffer->device, aspects, 1u << samples_log2, index, unrestricted, pipeline);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return VK_NULL_HANDLE;
}
}

2
src/amd/vulkan/radv_meta_copy_vrs_htile.c
View File

@@ -224,7 +224,7 @@ radv_copy_vrs_htile(struct radv_cmd_buffer *cmd_buffer, struct radv_image *vrs_i
VkResult ret = radv_device_init_meta_copy_vrs_htile_state(cmd_buffer->device,
&dst_image->planes[0].surface);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return;
}
}

2
src/amd/vulkan/radv_meta_dcc_retile.c
View File

@@ -199,7 +199,7 @@ radv_retile_dcc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image)
VkResult ret =
radv_device_init_meta_dcc_retile_state(cmd_buffer->device, &image->planes[0].surface);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return;
}
}

4
src/amd/vulkan/radv_meta_decompress.c
View File

@@ -369,14 +369,14 @@ radv_get_depth_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_image *i
ret = create_pipeline(cmd_buffer->device, samples, state->depth_decomp[samples_log2].p_layout,
DEPTH_DECOMPRESS, &state->depth_decomp[samples_log2].decompress_pipeline);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return NULL;
}
ret = create_pipeline(cmd_buffer->device, samples, state->depth_decomp[samples_log2].p_layout,
DEPTH_RESUMMARIZE, &state->depth_decomp[samples_log2].resummarize_pipeline);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return NULL;
}
}

2
src/amd/vulkan/radv_meta_etc_decode.c
View File

@@ -650,7 +650,7 @@ radv_get_etc_decode_pipeline(struct radv_cmd_buffer *cmd_buffer)
ret = create_decode_pipeline(device, pipeline);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return VK_NULL_HANDLE;
}
}

4
src/amd/vulkan/radv_meta_fast_clear.c
View File

@@ -586,7 +586,7 @@ radv_process_color_image(struct radv_cmd_buffer *cmd_buffer, struct radv_image *
ret = radv_device_init_meta_fast_clear_flush_state_internal(device);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return;
}
}
@@ -725,7 +725,7 @@ radv_decompress_dcc_compute(struct radv_cmd_buffer *cmd_buffer, struct radv_imag
if (!cmd_buffer->device->meta_state.fast_clear_flush.cmask_eliminate_pipeline) {
VkResult ret = radv_device_init_meta_fast_clear_flush_state_internal(cmd_buffer->device);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return;
}
}

4
src/amd/vulkan/radv_meta_resolve.c
View File

@@ -415,7 +415,7 @@ radv_meta_resolve_hardware_image(struct radv_cmd_buffer *cmd_buffer, struct radv
VkResult ret = build_resolve_pipeline(device, fs_key);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
break;
}
@@ -635,7 +635,7 @@ radv_cmd_buffer_resolve_subpass_hw(struct radv_cmd_buffer *cmd_buffer)
VkResult ret = build_resolve_pipeline(
cmd_buffer->device, radv_format_meta_fs_key(cmd_buffer->device, dst_iview->vk.format));
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
continue;
}

4
src/amd/vulkan/radv_meta_resolve_cs.c
View File

@@ -512,7 +512,7 @@ radv_get_resolve_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_image_
ret = create_resolve_pipeline(device, samples, vk_format_is_int(src_iview->vk.format),
vk_format_is_srgb(src_iview->vk.format), pipeline);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return NULL;
}
}
@@ -645,7 +645,7 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image
ret = create_depth_stencil_resolve_pipeline(device, samples, index, resolve_mode, pipeline);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return;
}
}

4
src/amd/vulkan/radv_meta_resolve_fs.c
View File

@@ -625,7 +625,7 @@ radv_get_resolve_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_image_
ret = create_resolve_pipeline(device, samples_log2, radv_fs_key_format_exemplars[fs_key]);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return NULL;
}
}
@@ -761,7 +761,7 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image
ret = create_depth_stencil_resolve_pipeline(device, samples_log2, index, resolve_mode);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return;
}
}

2
src/amd/vulkan/radv_private.h
View File

@@ -1614,8 +1614,6 @@ struct radv_cmd_buffer {
bool gds_oa_needed; /* for GFX10 streamout */
bool sample_positions_needed;
VkResult record_result;
uint64_t gfx9_fence_va;
uint32_t gfx9_fence_idx;
uint64_t gfx9_eop_bug_va;

2
src/amd/vulkan/radv_query.c
View File

@@ -975,7 +975,7 @@ radv_query_shader(struct radv_cmd_buffer *cmd_buffer, VkPipeline *pipeline,
if (!*pipeline) {
VkResult ret = radv_device_init_meta_query_state_internal(device);
if (ret != VK_SUCCESS) {
cmd_buffer->record_result = ret;
vk_command_buffer_set_error(&cmd_buffer->vk, ret);
return;
}
}