From b62d1c257eef41a2257704ecee579c2b721993d8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Mon, 10 Oct 2022 13:17:37 +0300 Subject: [PATCH] anv: mark debug variables with ASSERTED MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit To clean up compilation warnings about unused variables when asserts are disabled. v2: UNUSED -> ASSERTED (Eric Engestrom) Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/vulkan/anv_pipeline.c | 4 ++-- src/intel/vulkan/genX_pipeline.c | 3 +-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 997b4cda4b3..4499a1961e5 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -137,7 +137,7 @@ anv_nir_lower_mesh_ext_instr(nir_builder *b, nir_instr *instr, void *data) assert(intrin->src[1].is_ssa); uint8_t components = intrin->src[1].ssa->num_components; - unsigned vertices_per_primitive = + ASSERTED unsigned vertices_per_primitive = num_mesh_vertices_per_primitive(b->shader->info.mesh.primitive_type); assert(vertices_per_primitive == components); assert(nir_intrinsic_write_mask(intrin) == (1u << components) - 1); @@ -1975,7 +1975,7 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline, struct vk_pipeline_cache *cache, const VkComputePipelineCreateInfo *info) { - const VkPipelineShaderStageCreateInfo *sinfo = &info->stage; + ASSERTED const VkPipelineShaderStageCreateInfo *sinfo = &info->stage; assert(sinfo->stage == VK_SHADER_STAGE_COMPUTE_BIT); VkPipelineCreationFeedback pipeline_feedback = { diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 495b9ccd290..4a04be33bd8 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -1887,8 +1887,7 @@ emit_3dstate_primitive_replication(struct anv_graphics_pipeline *pipeline, return; } - uint32_t view_mask = rp->view_mask; - assert(replication_count == util_bitcount(view_mask)); + assert(replication_count == util_bitcount(rp->view_mask)); assert(replication_count <= MAX_VIEWS_FOR_PRIMITIVE_REPLICATION); anv_batch_emit(&pipeline->base.batch, GENX(3DSTATE_PRIMITIVE_REPLICATION), pr) {