intel/compiler: remove the operand restriction for src1 on GLK
Commit5847de6e9a
implemented a restriction that applies to ICL, but wrongly marked it as also applying to GLK. Reviewers or MR !1125 pointed this, and the commit history shows removal of GLK to parts of the patch, but it turns there was still a left-over GLK check in the code. This code was breaking some of the i8vec2 tests on GLK, for example: dEQP-VK.subgroups.arithmetic.compute.subgroupadd_i8vec2 Removing the GLK check solves the issue for GLK. I don't see a reason on why implementing this restriction would actually break GLK, so there's still more to investigate here since this bug may be affecting ICL+, but let's apply the real GLK fix while we analyze and discuss the other possible issues. Fixes:5847de6e9a
("intel/compiler: don't use byte operands for src1 on ICL") BSpec: 3017 Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
This commit is contained in:
@@ -736,8 +736,7 @@ namespace brw {
|
||||
src_reg
|
||||
fix_byte_src(const src_reg &src) const
|
||||
{
|
||||
if ((shader->devinfo->gen < 11 && !shader->devinfo->is_geminilake) ||
|
||||
type_sz(src.type) != 1)
|
||||
if (shader->devinfo->gen < 11 || type_sz(src.type) != 1)
|
||||
return src;
|
||||
|
||||
dst_reg temp = vgrf(src.type == BRW_REGISTER_TYPE_UB ?
|
||||
|
Reference in New Issue
Block a user