OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

intel/compiler: Rename brw_nir_lower_image_load_store to brw_nir_lower_storage_image

Browse Source 
Reworks:
 * Add crocus

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9466>
This commit is contained in:
Jordan Justen
2021-02-03 11:34:46 -08:00
parent 6898549d56
commit b5514a2236
7 changed files with 11 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/gallium/drivers/crocus/crocus_program.c
View File

@@ -2698,7 +2698,7 @@ crocus_create_uncompiled_shader(struct pipe_context *ctx,
brw_preprocess_nir(screen->compiler, nir, NULL);
NIR_PASS_V(nir, brw_nir_lower_image_load_store, devinfo, false);
NIR_PASS_V(nir, brw_nir_lower_storage_image, devinfo, false);
NIR_PASS_V(nir, crocus_lower_storage_image_derefs);
nir_sweep(nir);

2
src/gallium/drivers/iris/iris_program.c
View File

@@ -2289,7 +2289,7 @@ iris_create_uncompiled_shader(struct iris_screen *screen,
brw_preprocess_nir(screen->compiler, nir, NULL);
NIR_PASS_V(nir, brw_nir_lower_image_load_store, devinfo,
NIR_PASS_V(nir, brw_nir_lower_storage_image, devinfo,
&ish->uses_atomic_load_store);
NIR_PASS_V(nir, iris_lower_storage_image_derefs);

6
src/intel/compiler/brw_nir.h
View File

@@ -122,9 +122,9 @@ bool brw_nir_lower_conversions(nir_shader *nir);
bool brw_nir_lower_scoped_barriers(nir_shader *nir);
bool brw_nir_lower_image_load_store(nir_shader *nir,
const struct intel_device_info *devinfo,
bool *uses_atomic_load_store);
bool brw_nir_lower_storage_image(nir_shader *nir,
const struct intel_device_info *devinfo,
bool *uses_atomic_load_store);
void brw_nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin,
nir_ssa_def *index);
void brw_nir_rewrite_bindless_image_intrinsic(nir_intrinsic_instr *intrin,

6
src/intel/compiler/brw_nir_lower_image_load_store.c → src/intel/compiler/brw_nir_lower_storage_image.c
View File

@@ -675,9 +675,9 @@ lower_image_size_instr(nir_builder *b,
}
bool
brw_nir_lower_image_load_store(nir_shader *shader,
const struct intel_device_info *devinfo,
bool *uses_atomic_load_store)
brw_nir_lower_storage_image(nir_shader *shader,
const struct intel_device_info *devinfo,
bool *uses_atomic_load_store)
{
bool progress = false;

2
src/intel/compiler/meson.build
View File

@@ -84,12 +84,12 @@ libintel_compiler_files = files(
'brw_nir_lower_conversions.c',
'brw_nir_lower_cs_intrinsics.c',
'brw_nir_lower_alpha_to_coverage.c',
'brw_nir_lower_image_load_store.c',
'brw_nir_lower_intersection_shader.c',
'brw_nir_lower_mem_access_bit_sizes.c',
'brw_nir_lower_rt_intrinsics.c',
'brw_nir_lower_scoped_barriers.c',
'brw_nir_lower_shader_calls.c',
'brw_nir_lower_storage_image.c',
'brw_nir_opt_peephole_ffma.c',
'brw_nir_rt.h',
'brw_nir_rt.c',

2
src/intel/vulkan/anv_pipeline.c
View File

@@ -876,7 +876,7 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline,
nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
NIR_PASS_V(nir, brw_nir_lower_image_load_store, compiler->devinfo, NULL);
NIR_PASS_V(nir, brw_nir_lower_storage_image, compiler->devinfo, NULL);
NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_global,
nir_address_format_64bit_global);

2
src/mesa/drivers/dri/i965/brw_program.c
View File

@@ -186,7 +186,7 @@ brw_nir_lower_resources(nir_shader *nir, struct gl_shader_program *shader_prog,
BITSET_COPY(prog->info.textures_used, prog->nir->info.textures_used);
BITSET_COPY(prog->info.textures_used_by_txf, prog->nir->info.textures_used_by_txf);
NIR_PASS_V(prog->nir, brw_nir_lower_image_load_store, devinfo, NULL);
NIR_PASS_V(prog->nir, brw_nir_lower_storage_image, devinfo, NULL);
if (prog->nir->info.stage == MESA_SHADER_COMPUTE &&
shader_prog->data->spirv) {