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intel/nir: Set has_base_workgroup_id for lower_compute_system_values

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This option didn't exist half a decade ago when I first implemented base
workgroup support in ANV.  It's cleaner to just have split system values
like all the other zero_base+base things do.

We currently only do this for COMPUTE and not KERNEL because it lets us
avoid changing intel_clc for now.  We can add KERNEL later if needed.
We also don't do this lowering for task/mesh.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20068>
This commit is contained in:
Jason Ekstrand
2022-11-29 14:05:19 -06:00
committed by Marge Bot
parent 19ad2629d0
commit b4dd3df227
1 changed files with 4 additions and 1 deletions
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5
src/intel/compiler/brw_nir.c
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@@ -974,7 +974,10 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir,
}
OPT(nir_lower_system_values);
OPT(nir_lower_compute_system_values, NULL);
nir_lower_compute_system_values_options lower_csv_options = {
.has_base_workgroup_id = nir->info.stage == MESA_SHADER_COMPUTE,
};
OPT(nir_lower_compute_system_values, &lower_csv_options);
const nir_lower_subgroups_options subgroups_options = {
.ballot_bit_size = 32,