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intel/fs: Add assert on the brw_STAGE_prog_data downcasts

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Motivation is to detect earlier certain bugs that can occur when
missing a check for the stage before using the downcast.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7540>
This commit is contained in:
Caio Marcelo de Oliveira Filho
2020-11-10 13:11:31 -09:00
parent 671c850310
commit b3daf341d4
6 changed files with 41 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

47
src/intel/compiler/brw_compiler.h
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@@ -703,6 +703,8 @@ struct brw_stage_prog_data {
GLuint nr_params; /**< number of float params/constants */
GLuint nr_pull_params;
gl_shader_stage stage;
/* zero_push_reg is a bitfield which indicates what push registers (if any)
* should be zeroed by SW at the start of the shader. The corresponding
* push_reg_mask_param specifies the param index (in 32-bit units) where
@@ -1340,27 +1342,38 @@ union brw_any_prog_data {
struct brw_cs_prog_data cs;
};
#define DEFINE_PROG_DATA_DOWNCAST(stage) \
static inline struct brw_##stage##_prog_data * \
brw_##stage##_prog_data(struct brw_stage_prog_data *prog_data) \
#define DEFINE_PROG_DATA_DOWNCAST(STAGE, CHECK) \
static inline struct brw_##STAGE##_prog_data * \
brw_##STAGE##_prog_data(struct brw_stage_prog_data *prog_data) \
{ \
return (struct brw_##stage##_prog_data *) prog_data; \
if (prog_data) \
assert(CHECK); \
return (struct brw_##STAGE##_prog_data *) prog_data; \
} \
static inline const struct brw_##stage##_prog_data * \
brw_##stage##_prog_data_const(const struct brw_stage_prog_data *prog_data) \
static inline const struct brw_##STAGE##_prog_data * \
brw_##STAGE##_prog_data_const(const struct brw_stage_prog_data *prog_data) \
{ \
return (const struct brw_##stage##_prog_data *) prog_data; \
if (prog_data) \
assert(CHECK); \
return (const struct brw_##STAGE##_prog_data *) prog_data; \
}
DEFINE_PROG_DATA_DOWNCAST(vue)
DEFINE_PROG_DATA_DOWNCAST(vs)
DEFINE_PROG_DATA_DOWNCAST(tcs)
DEFINE_PROG_DATA_DOWNCAST(tes)
DEFINE_PROG_DATA_DOWNCAST(gs)
DEFINE_PROG_DATA_DOWNCAST(wm)
DEFINE_PROG_DATA_DOWNCAST(cs)
DEFINE_PROG_DATA_DOWNCAST(ff_gs)
DEFINE_PROG_DATA_DOWNCAST(clip)
DEFINE_PROG_DATA_DOWNCAST(sf)
DEFINE_PROG_DATA_DOWNCAST(vs, prog_data->stage == MESA_SHADER_VERTEX)
DEFINE_PROG_DATA_DOWNCAST(tcs, prog_data->stage == MESA_SHADER_TESS_CTRL)
DEFINE_PROG_DATA_DOWNCAST(tes, prog_data->stage == MESA_SHADER_TESS_EVAL)
DEFINE_PROG_DATA_DOWNCAST(gs, prog_data->stage == MESA_SHADER_GEOMETRY)
DEFINE_PROG_DATA_DOWNCAST(wm, prog_data->stage == MESA_SHADER_FRAGMENT)
DEFINE_PROG_DATA_DOWNCAST(cs, prog_data->stage == MESA_SHADER_COMPUTE)
DEFINE_PROG_DATA_DOWNCAST(vue, prog_data->stage == MESA_SHADER_VERTEX ||
prog_data->stage == MESA_SHADER_TESS_CTRL ||
prog_data->stage == MESA_SHADER_TESS_EVAL ||
prog_data->stage == MESA_SHADER_GEOMETRY)
/* These are not really brw_stage_prog_data. */
DEFINE_PROG_DATA_DOWNCAST(ff_gs, true)
DEFINE_PROG_DATA_DOWNCAST(clip, true)
DEFINE_PROG_DATA_DOWNCAST(sf, true)
#undef DEFINE_PROG_DATA_DOWNCAST
struct brw_compile_stats {

3
src/intel/compiler/brw_fs.cpp
View File

@@ -8769,6 +8769,8 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
struct brw_compile_stats *stats,
char **error_str)
{
prog_data->base.stage = MESA_SHADER_FRAGMENT;
const struct gen_device_info *devinfo = compiler->devinfo;
const unsigned max_subgroup_size = compiler->devinfo->gen >= 6 ? 32 : 16;
@@ -9133,6 +9135,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
struct brw_compile_stats *stats,
char **error_str)
{
prog_data->base.stage = MESA_SHADER_COMPUTE;
prog_data->base.total_shared = nir->info.cs.shared_size;
/* Generate code for all the possible SIMD variants. */

2
src/intel/compiler/brw_shader.cpp
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@@ -1283,6 +1283,8 @@ brw_compile_tes(const struct brw_compiler *compiler,
const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_EVAL];
const unsigned *assembly;
prog_data->base.base.stage = MESA_SHADER_TESS_EVAL;
nir->info.inputs_read = key->inputs_read;
nir->info.patch_inputs_read = key->patch_inputs_read;

2
src/intel/compiler/brw_vec4.cpp
View File

@@ -2836,6 +2836,8 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
struct brw_compile_stats *stats,
char **error_str)
{
prog_data->base.base.stage = MESA_SHADER_VERTEX;
const bool is_scalar = compiler->scalar_stage[MESA_SHADER_VERTEX];
brw_nir_apply_key(nir, compiler, &key->base, 8, is_scalar);

2
src/intel/compiler/brw_vec4_gs_visitor.cpp
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@@ -598,6 +598,8 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
const bool is_scalar = compiler->scalar_stage[MESA_SHADER_GEOMETRY];
prog_data->base.base.stage = MESA_SHADER_GEOMETRY;
/* The GLSL linker will have already matched up GS inputs and the outputs
* of prior stages. The driver does extend VS outputs in some cases, but
* only for legacy OpenGL or Gen4-5 hardware, neither of which offer

2
src/intel/compiler/brw_vec4_tcs.cpp
View File

@@ -370,6 +370,8 @@ brw_compile_tcs(const struct brw_compiler *compiler,
const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_CTRL];
const unsigned *assembly;
vue_prog_data->base.stage = MESA_SHADER_TESS_CTRL;
nir->info.outputs_written = key->outputs_written;
nir->info.patch_outputs_written = key->patch_outputs_written;