glsl: Rework assignments with write_masks to have LHS chan count match RHS.
It turns out that most people new to this IR are surprised when an assignment to (say) 3 components on the LHS takes 4 components on the RHS. It also makes for quite strange IR output: (assign (constant bool (1)) (x) (var_ref color) (swiz x (var_ref v) )) (assign (constant bool (1)) (y) (var_ref color) (swiz yy (var_ref v) )) (assign (constant bool (1)) (z) (var_ref color) (swiz zzz (var_ref v) )) But even worse, even we get it wrong, as shown by this line of our current step(float, vec4): (assign (constant bool (1)) (w) (var_ref t) (expression float b2f (expression bool >= (swiz w (var_ref x))(var_ref edge)))) where we try to assign a float to the writemasked-out x channel and don't supply anything for the actual w channel we're writing. Drivers right now just get lucky since ir_to_mesa spams the float value across all the source channels of a vec4. Instead, the RHS will now have a number of components equal to the number of components actually being written. Hopefully this confuses everyone less, and it also makes codegen for a scalar target simpler. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
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@@ -310,14 +310,11 @@ ir_mat_op_to_vec_visitor::do_equal_mat_mat(ir_variable *result_var,
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new(this->mem_ctx) ir_expression(ir_binop_any_nequal,
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glsl_type::bool_type, op0, op1);
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ir_rvalue *const swiz =
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new(this->mem_ctx) ir_swizzle(cmp, i, i, i, i, columns);
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ir_dereference *const lhs =
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new(this->mem_ctx) ir_dereference_variable(tmp_bvec);
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ir_assignment *const assign =
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new(this->mem_ctx) ir_assignment(lhs, swiz, NULL, (1U << i));
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new(this->mem_ctx) ir_assignment(lhs, cmp, NULL, (1U << i));
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this->base_ir->insert_before(assign);
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}
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