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turnip: move A6XX_RB_ALPHA_CONTROL write to init_hw

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Its always 0.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5641>
This commit is contained in:
Jonathan Marek
2020-09-17 09:38:57 -04:00
committed by Marge Bot
parent d1588c78ab
commit b2fa2d99ae
3 changed files with 3 additions and 5 deletions
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2
src/freedreno/vulkan/tu_clear_blit.c
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@@ -761,7 +761,6 @@ r3d_setup(struct tu_cmd_buffer *cmd,
tu_cs_emit_regs(cs, A6XX_SP_BLEND_CNTL());
tu_cs_emit_regs(cs, A6XX_RB_BLEND_CNTL(.sample_mask = 0xffff));
tu_cs_emit_regs(cs, A6XX_RB_ALPHA_CONTROL());
tu_cs_emit_regs(cs, A6XX_RB_DEPTH_PLANE_CNTL());
tu_cs_emit_regs(cs, A6XX_RB_DEPTH_CNTL());
@@ -1885,7 +1884,6 @@ tu_clear_sysmem_attachments(struct tu_cmd_buffer *cmd,
tu_cs_emit_regs(cs, A6XX_SP_BLEND_CNTL());
tu_cs_emit_regs(cs, A6XX_RB_BLEND_CNTL(.independent_blend = 1, .sample_mask = 0xffff));
tu_cs_emit_regs(cs, A6XX_RB_ALPHA_CONTROL());
for (uint32_t i = 0; i < mrt_count; i++) {
tu_cs_emit_regs(cs, A6XX_RB_MRT_CONTROL(i,
.component_enable = COND(clear_rts & (1 << i), 0xf)));

2
src/freedreno/vulkan/tu_cmd_buffer.c
View File

@@ -798,6 +798,8 @@ tu6_init_hw(struct tu_cmd_buffer *cmd, struct tu_cs *cs)
tu_cs_emit_write_reg(cs, REG_A6XX_PC_MODE_CNTL, 0x0000001f);
tu_cs_emit_regs(cs, A6XX_RB_ALPHA_CONTROL());
/* we don't use this yet.. probably best to disable.. */
tu_cs_emit_pkt7(cs, CP_SET_DRAW_STATE, 3);
tu_cs_emit(cs, CP_SET_DRAW_STATE__0_COUNT(0) |

4
src/freedreno/vulkan/tu_pipeline.c
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@@ -2372,10 +2372,8 @@ tu_pipeline_builder_parse_depth_stencil(struct tu_pipeline_builder *builder,
? ds_info : &dummy_ds_info;
struct tu_cs cs;
pipeline->ds_state = tu_cs_draw_state(&pipeline->cs, &cs, 6);
pipeline->ds_state = tu_cs_draw_state(&pipeline->cs, &cs, 4);
/* move to hw ctx init? */
tu_cs_emit_regs(&cs, A6XX_RB_ALPHA_CONTROL());
tu6_emit_depth_control(&cs, ds_info_depth,
builder->create_info->pRasterizationState);
tu6_emit_stencil_control(&cs, ds_info);