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radv: restore previous MRT CB_SHADER_MASK logic

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It was moved to the shader info pass to compute MRTs from the shader
outputs to fix some CTS failures but this is actually unnecessary.
The CTS failures were actually CTS bugs.

This reverts 70cc80805c ("radv: compute CB_SHADER_MASK from the
fragment shader outputs") and 76ee45d3a8 ("radv: adjust CB_SHADER_MASK
for dual-source blending in the shader info pass").

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9703>
This commit is contained in:
Samuel Pitoiset
2021-03-19 07:52:07 +01:00
committed by Marge Bot
parent 2fb71504f0
commit b2c1ed262d
4 changed files with 1 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
src/amd/vulkan/radv_pipeline.c
View File

@@ -568,6 +568,7 @@ radv_pipeline_compute_spi_color_formats(const struct radv_pipeline *pipeline,
col_format |= (col_format & 0xf) << 4;
}
blend->cb_shader_mask = ac_get_cb_shader_mask(col_format);
blend->spi_shader_col_format = col_format;
blend->col_format_is_int8 = is_int8;
blend->col_format_is_int10 = is_int10;
@@ -2689,7 +2690,6 @@ radv_generate_graphics_pipeline_key(const struct radv_pipeline *pipeline,
}
key.col_format = blend->spi_shader_col_format;
key.is_dual_src = blend->mrt0_is_dual_src;
if (pipeline->device->physical_device->rad_info.chip_class < GFX8) {
key.is_int8 = blend->col_format_is_int8;
key.is_int10 = blend->col_format_is_int10;
@@ -2802,7 +2802,6 @@ radv_fill_shader_keys(struct radv_device *device,
keys[MESA_SHADER_FRAGMENT].fs.is_int10 = key->is_int10;
keys[MESA_SHADER_FRAGMENT].fs.log2_ps_iter_samples = key->log2_ps_iter_samples;
keys[MESA_SHADER_FRAGMENT].fs.num_samples = key->num_samples;
keys[MESA_SHADER_FRAGMENT].fs.is_dual_src = key->is_dual_src;
if (nir[MESA_SHADER_COMPUTE]) {
unsigned subgroup_size = key->compute_subgroup_size;
@@ -5502,8 +5501,6 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
blend.spi_shader_col_format = V_028714_SPI_SHADER_32_R;
}
blend.cb_shader_mask = ps->info.ps.cb_shader_mask;
if (extra &&
(extra->custom_blend_mode == V_028808_CB_ELIMINATE_FAST_CLEAR ||
extra->custom_blend_mode == V_028808_CB_FMASK_DECOMPRESS ||

1
src/amd/vulkan/radv_private.h
View File

@@ -368,7 +368,6 @@ struct radv_pipeline_key {
uint32_t is_int10;
uint8_t log2_ps_iter_samples;
uint8_t num_samples;
bool is_dual_src;
uint32_t has_multiview_view_index : 1;
uint32_t optimisations_disabled : 1;
uint8_t topology;

2
src/amd/vulkan/radv_shader.h
View File

@@ -93,7 +93,6 @@ struct radv_fs_variant_key {
uint8_t num_samples;
uint32_t is_int8;
uint32_t is_int10;
bool is_dual_src;
};
struct radv_cs_variant_key {
@@ -317,7 +316,6 @@ struct radv_shader_info {
uint32_t explicit_shaded_mask;
uint32_t float16_shaded_mask;
uint32_t num_interp;
uint32_t cb_shader_mask;
bool can_discard;
bool early_fragment_test;
bool post_depth_coverage;

29
src/amd/vulkan/radv_shader_info.c
View File

@@ -413,17 +413,6 @@ gather_info_output_decl_ps(const nir_shader *nir, const nir_variable *var,
default:
break;
}
if (idx >= FRAG_RESULT_DATA0 && idx <= FRAG_RESULT_DATA7) {
unsigned num_components = glsl_get_component_slots(glsl_without_array(var->type));
unsigned num_slots = glsl_count_attribute_slots(var->type, false);
unsigned write_mask = (1 << num_components) - 1;
unsigned slot = idx - FRAG_RESULT_DATA0;
for (unsigned i = 0; i < num_slots; i++) {
info->ps.cb_shader_mask |= write_mask << ((slot + i) * 4);
}
}
}
static void
@@ -706,22 +695,4 @@ radv_nir_shader_info_pass(const struct nir_shader *nir,
}
info->float_controls_mode = nir->info.float_controls_execution_mode;
if (nir->info.stage == MESA_SHADER_FRAGMENT) {
/* If the i-th output is used, all previous outputs must be
* non-zero to match the target format.
* TODO: compact MRT to avoid holes and to remove this
* workaround.
*/
unsigned num_targets = (util_last_bit(info->ps.cb_shader_mask) + 3) / 4;
for (unsigned i = 0; i < num_targets; i++) {
if (!(info->ps.cb_shader_mask & (0xfu << (i * 4)))) {
info->ps.cb_shader_mask |= 0xfu << (i * 4);
}
}
if (key->fs.is_dual_src) {
info->ps.cb_shader_mask |= (info->ps.cb_shader_mask & 0xf) << 4;
}
}
}