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brw: introduce a new register type for the address register

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We want to reuse the brw::nr field as a virtual address register
identifer. So we can't use brw::file=ARF brw::nr=ADDRESS.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28199>
This commit is contained in:
Lionel Landwerlin
2024-12-10 10:49:08 +02:00
committed by Marge Bot
parent 842c91300f
commit b110b06447
7 changed files with 67 additions and 37 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/intel/compiler/brw_eu_defines.h
View File

@@ -783,6 +783,7 @@ enum ENUM_PACKED brw_reg_file {
FIXED_GRF,
IMM,
ADDRESS,
VGRF,
ATTR,
UNIFORM, /* prog_data->params[reg] */

45
src/intel/compiler/brw_eu_emit.c
View File

@@ -59,6 +59,7 @@ brw_set_dest(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg dest)
(brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND ||
brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC)) {
assert(dest.file == FIXED_GRF ||
dest.file == ADDRESS ||
dest.file == ARF);
assert(dest.address_mode == BRW_ADDRESS_DIRECT);
assert(dest.subnr == 0);
@@ -66,13 +67,14 @@ brw_set_dest(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg dest)
(dest.hstride == BRW_HORIZONTAL_STRIDE_1 &&
dest.vstride == dest.width + 1));
assert(!dest.negate && !dest.abs);
brw_eu_inst_set_dst_reg_file(devinfo, inst, dest.file);
brw_eu_inst_set_dst_reg_file(devinfo, inst, phys_file(dest));
brw_eu_inst_set_dst_da_reg_nr(devinfo, inst, phys_nr(devinfo, dest));
} else if (brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDS ||
brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDSC) {
assert(devinfo->ver < 12);
assert(dest.file == FIXED_GRF ||
dest.file == ADDRESS ||
dest.file == ARF);
assert(dest.address_mode == BRW_ADDRESS_DIRECT);
assert(dest.subnr % 16 == 0);
@@ -81,9 +83,9 @@ brw_set_dest(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg dest)
assert(!dest.negate && !dest.abs);
brw_eu_inst_set_dst_da_reg_nr(devinfo, inst, dest.nr);
brw_eu_inst_set_dst_da16_subreg_nr(devinfo, inst, dest.subnr / 16);
brw_eu_inst_set_send_dst_reg_file(devinfo, inst, dest.file);
brw_eu_inst_set_send_dst_reg_file(devinfo, inst, phys_file(dest));
} else {
brw_eu_inst_set_dst_file_type(devinfo, inst, dest.file, dest.type);
brw_eu_inst_set_dst_file_type(devinfo, inst, phys_file(dest), dest.type);
brw_eu_inst_set_dst_address_mode(devinfo, inst, dest.address_mode);
if (dest.address_mode == BRW_ADDRESS_DIRECT) {
@@ -158,7 +160,7 @@ brw_set_src0(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg)
reg.vstride == reg.width + 1));
assert(!reg.negate && !reg.abs);
brw_eu_inst_set_send_src0_reg_file(devinfo, inst, reg.file);
brw_eu_inst_set_send_src0_reg_file(devinfo, inst, phys_file(reg));
brw_eu_inst_set_src0_da_reg_nr(devinfo, inst, phys_nr(devinfo, reg));
if (reg.file == ARF && reg.nr == BRW_ARF_SCALAR) {
@@ -179,7 +181,7 @@ brw_set_src0(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg)
brw_eu_inst_set_src0_da_reg_nr(devinfo, inst, reg.nr);
brw_eu_inst_set_src0_da16_subreg_nr(devinfo, inst, reg.subnr / 16);
} else {
brw_eu_inst_set_src0_file_type(devinfo, inst, reg.file, reg.type);
brw_eu_inst_set_src0_file_type(devinfo, inst, phys_file(reg), reg.type);
brw_eu_inst_set_src0_abs(devinfo, inst, reg.abs);
brw_eu_inst_set_src0_negate(devinfo, inst, reg.negate);
brw_eu_inst_set_src0_address_mode(devinfo, inst, reg.address_mode);
@@ -266,7 +268,8 @@ brw_set_src1(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg)
(brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SEND ||
brw_eu_inst_opcode(p->isa, inst) == BRW_OPCODE_SENDC))) {
assert(reg.file == FIXED_GRF ||
reg.file == ARF);
reg.file == ARF ||
reg.file == ADDRESS);
assert(reg.address_mode == BRW_ADDRESS_DIRECT);
assert(reg.subnr == 0);
assert(has_scalar_region(reg) ||
@@ -274,7 +277,7 @@ brw_set_src1(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg)
reg.vstride == reg.width + 1));
assert(!reg.negate && !reg.abs);
brw_eu_inst_set_send_src1_reg_nr(devinfo, inst, phys_nr(devinfo, reg));
brw_eu_inst_set_send_src1_reg_file(devinfo, inst, reg.file);
brw_eu_inst_set_send_src1_reg_file(devinfo, inst, phys_file(reg));
} else {
/* From the IVB PRM Vol. 4, Pt. 3, Section 3.3.3.5:
*
@@ -284,7 +287,7 @@ brw_set_src1(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg)
assert(reg.file != ARF ||
(reg.nr & 0xF0) != BRW_ARF_ACCUMULATOR);
brw_eu_inst_set_src1_file_type(devinfo, inst, reg.file, reg.type);
brw_eu_inst_set_src1_file_type(devinfo, inst, phys_file(reg), reg.type);
brw_eu_inst_set_src1_abs(devinfo, inst, reg.abs);
brw_eu_inst_set_src1_negate(devinfo, inst, reg.negate);
@@ -589,7 +592,7 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
(dest.file == ARF &&
(dest.nr & 0xF0) == BRW_ARF_ACCUMULATOR));
brw_eu_inst_set_3src_a1_dst_reg_file(devinfo, inst, dest.file);
brw_eu_inst_set_3src_a1_dst_reg_file(devinfo, inst, phys_file(dest));
brw_eu_inst_set_3src_dst_reg_nr(devinfo, inst, phys_nr(devinfo, dest));
brw_eu_inst_set_3src_a1_dst_subreg_nr(devinfo, inst, phys_subnr(devinfo, dest) / 8);
brw_eu_inst_set_3src_a1_dst_hstride(devinfo, inst, BRW_ALIGN1_3SRC_DST_HORIZONTAL_STRIDE_1);
@@ -657,20 +660,20 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
if (src0.file == IMM) {
brw_eu_inst_set_3src_a1_src0_is_imm(devinfo, inst, 1);
} else {
brw_eu_inst_set_3src_a1_src0_reg_file(devinfo, inst, src0.file);
brw_eu_inst_set_3src_a1_src0_reg_file(devinfo, inst, phys_file(src0));
}
brw_eu_inst_set_3src_a1_src1_reg_file(devinfo, inst, src1.file);
brw_eu_inst_set_3src_a1_src1_reg_file(devinfo, inst, phys_file(src1));
if (src2.file == IMM) {
brw_eu_inst_set_3src_a1_src2_is_imm(devinfo, inst, 1);
} else {
brw_eu_inst_set_3src_a1_src2_reg_file(devinfo, inst, src2.file);
brw_eu_inst_set_3src_a1_src2_reg_file(devinfo, inst, phys_file(src2));
}
} else {
brw_eu_inst_set_3src_a1_src0_reg_file(devinfo, inst, src0.file);
brw_eu_inst_set_3src_a1_src1_reg_file(devinfo, inst, src1.file);
brw_eu_inst_set_3src_a1_src2_reg_file(devinfo, inst, src2.file);
brw_eu_inst_set_3src_a1_src0_reg_file(devinfo, inst, phys_file(src0));
brw_eu_inst_set_3src_a1_src1_reg_file(devinfo, inst, phys_file(src1));
brw_eu_inst_set_3src_a1_src2_reg_file(devinfo, inst, phys_file(src2));
}
} else {
@@ -774,20 +777,20 @@ brw_dpas_three_src(struct brw_codegen *p, enum opcode opcode,
(src0.file == ARF &&
src0.nr == BRW_ARF_NULL));
brw_eu_inst_set_dpas_3src_src0_reg_file(devinfo, inst, src0.file);
brw_eu_inst_set_dpas_3src_src0_reg_file(devinfo, inst, phys_file(src0));
brw_eu_inst_set_dpas_3src_src0_reg_nr(devinfo, inst, phys_nr(devinfo, src0));
brw_eu_inst_set_dpas_3src_src0_subreg_nr(devinfo, inst, phys_subnr(devinfo, src0));
assert(src1.file == FIXED_GRF);
brw_eu_inst_set_dpas_3src_src1_reg_file(devinfo, inst, src1.file);
brw_eu_inst_set_dpas_3src_src1_reg_file(devinfo, inst, phys_file(src1));
brw_eu_inst_set_dpas_3src_src1_reg_nr(devinfo, inst, phys_nr(devinfo, src1));
brw_eu_inst_set_dpas_3src_src1_subreg_nr(devinfo, inst, phys_subnr(devinfo, src1));
brw_eu_inst_set_dpas_3src_src1_subbyte(devinfo, inst, BRW_SUB_BYTE_PRECISION_NONE);
assert(src2.file == FIXED_GRF);
brw_eu_inst_set_dpas_3src_src2_reg_file(devinfo, inst, src2.file);
brw_eu_inst_set_dpas_3src_src2_reg_file(devinfo, inst, phys_file(src2));
brw_eu_inst_set_dpas_3src_src2_reg_nr(devinfo, inst, phys_nr(devinfo, src2));
brw_eu_inst_set_dpas_3src_src2_subreg_nr(devinfo, inst, phys_subnr(devinfo, src2));
brw_eu_inst_set_dpas_3src_src2_subbyte(devinfo, inst, BRW_SUB_BYTE_PRECISION_NONE);
@@ -1613,8 +1616,7 @@ brw_send_indirect_split_message(struct brw_codegen *p,
brw_eu_inst_set_send_sel_reg32_desc(devinfo, send, 0);
brw_eu_inst_set_send_desc(devinfo, send, desc.ud);
} else {
assert(desc.file == ARF);
assert(desc.nr == BRW_ARF_ADDRESS);
assert(desc.file == ADDRESS);
assert(desc.subnr == 0);
brw_eu_inst_set_send_sel_reg32_desc(devinfo, send, 1);
}
@@ -1623,8 +1625,7 @@ brw_send_indirect_split_message(struct brw_codegen *p,
brw_eu_inst_set_send_sel_reg32_ex_desc(devinfo, send, 0);
brw_eu_inst_set_sends_ex_desc(devinfo, send, ex_desc.ud, false);
} else {
assert(ex_desc.file == ARF);
assert(ex_desc.nr == BRW_ARF_ADDRESS);
assert(ex_desc.file == ADDRESS);
assert((ex_desc.subnr & 0x3) == 0);
brw_eu_inst_set_send_sel_reg32_ex_desc(devinfo, send, 1);
brw_eu_inst_set_send_ex_desc_ia_subreg_nr(devinfo, send, phys_subnr(devinfo, ex_desc) >> 2);

2
src/intel/compiler/brw_fs.cpp
View File

@@ -72,6 +72,7 @@ fs_inst::init(enum opcode opcode, uint8_t exec_size, const brw_reg &dst,
/* This will be the case for almost all instructions. */
switch (dst.file) {
case VGRF:
case ADDRESS:
case ARF:
case FIXED_GRF:
case ATTR:
@@ -675,6 +676,7 @@ fs_inst::size_read(const struct intel_device_info *devinfo, int arg) const
case IMM:
return components_read(arg) * brw_type_size_bytes(src[arg].type);
case BAD_FILE:
case ADDRESS:
case ARF:
case FIXED_GRF:
case VGRF:

1
src/intel/compiler/brw_fs_generator.cpp
View File

@@ -70,6 +70,7 @@ normalize_brw_reg_for_encoding(brw_reg *reg)
struct brw_reg brw_reg;
switch (reg->file) {
case ADDRESS:
case ARF:
case FIXED_GRF:
case IMM:

14
src/intel/compiler/brw_print.cpp
View File

@@ -433,20 +433,19 @@ brw_print_instruction(const fs_visitor &s, const fs_inst *inst, FILE *file, cons
case ATTR:
fprintf(file, "***attr%d***", inst->dst.nr);
break;
case ADDRESS:
fprintf(file, "a0.%d", inst->dst.subnr);
break;
case ARF:
switch (inst->dst.nr & 0xF0) {
case BRW_ARF_NULL:
fprintf(file, "null");
break;
case BRW_ARF_ADDRESS:
fprintf(file, "a0.%d", inst->dst.subnr);
break;
case BRW_ARF_ACCUMULATOR:
if (inst->dst.subnr == 0)
fprintf(file, "acc%d", inst->dst.nr & 0x0F);
else
fprintf(file, "acc%d.%d", inst->dst.nr & 0x0F, inst->dst.subnr);
break;
case BRW_ARF_FLAG:
fprintf(file, "f%d.%d", inst->dst.nr & 0xf, inst->dst.subnr);
@@ -498,6 +497,9 @@ brw_print_instruction(const fs_visitor &s, const fs_inst *inst, FILE *file, cons
case FIXED_GRF:
fprintf(file, "g%d", inst->src[i].nr);
break;
case ADDRESS:
fprintf(file, "a0.%d", inst->src[i].subnr);
break;
case ATTR:
fprintf(file, "attr%d", inst->src[i].nr);
break;
@@ -558,9 +560,6 @@ brw_print_instruction(const fs_visitor &s, const fs_inst *inst, FILE *file, cons
case BRW_ARF_NULL:
fprintf(file, "null");
break;
case BRW_ARF_ADDRESS:
fprintf(file, "a0.%d", inst->src[i].subnr);
break;
case BRW_ARF_ACCUMULATOR:
if (inst->src[i].subnr == 0)
fprintf(file, "acc%d", inst->src[i].nr & 0x0F);
@@ -670,4 +669,3 @@ brw_print_swsb(FILE *f, const struct intel_device_info *devinfo, const tgl_swsb
swsb.mode & TGL_SBID_DST ? ".dst" : ".src"));
}
}

4
src/intel/compiler/brw_reg.cpp
View File

@@ -279,6 +279,7 @@ bool
brw_reg::is_contiguous() const
{
switch (file) {
case ADDRESS:
case ARF:
case FIXED_GRF:
return hstride == BRW_HORIZONTAL_STRIDE_1 &&
@@ -298,7 +299,7 @@ brw_reg::is_contiguous() const
unsigned
brw_reg::component_size(unsigned width) const
{
if (file == ARF || file == FIXED_GRF) {
if (file == ADDRESS || file == ARF || file == FIXED_GRF) {
const unsigned w = MIN2(width, 1u << this->width);
const unsigned h = width >> this->width;
const unsigned vs = vstride ? 1 << (vstride - 1) : 0;
@@ -312,4 +313,3 @@ brw_reg::component_size(unsigned width) const
return MAX2(width * stride, 1) * brw_type_size_bytes(type);
}
}

37
src/intel/compiler/brw_reg.h
View File

@@ -235,18 +235,39 @@ typedef struct brw_reg {
#endif /* __cplusplus */
} brw_reg;
static inline unsigned
phys_file(const struct brw_reg reg)
{
switch (reg.file) {
case ARF:
case FIXED_GRF:
case IMM:
return reg.file;
case ADDRESS:
return ARF;
default:
unreachable("register type should have been lowered");
}
}
static inline unsigned
phys_nr(const struct intel_device_info *devinfo, const struct brw_reg reg)
{
if (devinfo->ver >= 20) {
if (reg.file == FIXED_GRF)
return reg.nr / 2;
else if (reg.file == ADDRESS)
return BRW_ARF_ADDRESS;
else if (reg.file == ARF &&
reg.nr >= BRW_ARF_ACCUMULATOR &&
reg.nr < BRW_ARF_FLAG)
return BRW_ARF_ACCUMULATOR + (reg.nr - BRW_ARF_ACCUMULATOR) / 2;
else
return reg.nr;
} else if (reg.file == ADDRESS) {
return BRW_ARF_ADDRESS;
} else {
return reg.nr;
}
@@ -576,6 +597,7 @@ byte_offset(struct brw_reg reg, unsigned bytes)
case UNIFORM:
reg.offset += bytes;
break;
case ADDRESS:
case ARF:
case FIXED_GRF: {
const unsigned suboffset = reg.subnr + bytes;
@@ -897,7 +919,7 @@ brw_null_vec(unsigned width)
static inline struct brw_reg
brw_address_reg(unsigned subnr)
{
return brw_uw1_reg(ARF, BRW_ARF_ADDRESS, subnr);
return brw_uw1_reg(ADDRESS, 0, subnr);
}
static inline struct brw_reg
@@ -1302,6 +1324,7 @@ horiz_offset(const brw_reg &reg, unsigned delta)
case VGRF:
case ATTR:
return byte_offset(reg, delta * reg.stride * brw_type_size_bytes(reg.type));
case ADDRESS:
case ARF:
case FIXED_GRF:
if (reg.is_null()) {
@@ -1328,6 +1351,7 @@ offset(brw_reg reg, unsigned width, unsigned delta)
switch (reg.file) {
case BAD_FILE:
break;
case ADDRESS:
case ARF:
case FIXED_GRF:
case VGRF:
@@ -1378,9 +1402,9 @@ reg_space(const brw_reg &r)
static inline unsigned
reg_offset(const brw_reg &r)
{
return (r.file == VGRF || r.file == IMM || r.file == ATTR ? 0 : r.nr) *
return (r.file == ADDRESS || r.file == VGRF || r.file == IMM || r.file == ATTR ? 0 : r.nr) *
(r.file == UNIFORM ? 4 : REG_SIZE) + r.offset +
(r.file == ARF || r.file == FIXED_GRF ? r.subnr : 0);
(r.file == ADDRESS || r.file == ARF || r.file == FIXED_GRF ? r.subnr : 0);
}
/**
@@ -1391,7 +1415,9 @@ reg_offset(const brw_reg &r)
static inline unsigned
reg_padding(const brw_reg &r)
{
const unsigned stride = ((r.file != ARF && r.file != FIXED_GRF) ? r.stride :
const unsigned stride = ((r.file != ADDRESS &&
r.file != ARF &&
r.file != FIXED_GRF) ? r.stride :
r.hstride == 0 ? 0 :
1 << (r.hstride - 1));
return (MAX2(1, stride) - 1) * brw_type_size_bytes(r.type);
@@ -1448,7 +1474,7 @@ is_periodic(const brw_reg &reg, unsigned n)
1);
return n % period == 0;
} else if (reg.file == ARF || reg.file == FIXED_GRF) {
} else if (reg.file == ADDRESS || reg.file == ARF || reg.file == FIXED_GRF) {
const unsigned period = (reg.hstride == 0 && reg.vstride == 0 ? 1 :
reg.vstride == 0 ? 1 << reg.width :
~0);
@@ -1499,6 +1525,7 @@ byte_stride(const brw_reg &reg)
case VGRF:
case ATTR:
return reg.stride * brw_type_size_bytes(reg.type);
case ADDRESS:
case ARF:
case FIXED_GRF:
if (reg.is_null()) {