radv: add has_scissor_bug for Vega10 and Raven

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset
2018-01-05 18:00:31 +01:00
parent b462ceb482
commit b09b3f8834
3 changed files with 6 additions and 2 deletions

View File

@@ -1122,8 +1122,7 @@ radv_emit_scissor(struct radv_cmd_buffer *cmd_buffer)
* scissor registers are changed. There is also a more efficient but * scissor registers are changed. There is also a more efficient but
* more involved alternative workaround. * more involved alternative workaround.
*/ */
if (cmd_buffer->device->physical_device->rad_info.family == CHIP_VEGA10 || if (cmd_buffer->device->physical_device->has_scissor_bug) {
cmd_buffer->device->physical_device->rad_info.family == CHIP_RAVEN) {
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH; cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH;
si_emit_cache_flush(cmd_buffer); si_emit_cache_flush(cmd_buffer);
} }

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@@ -265,6 +265,10 @@ radv_physical_device_init(struct radv_physical_device *device,
device->cpdma_prefetch_writes_memory = device->rad_info.chip_class <= VI; device->cpdma_prefetch_writes_memory = device->rad_info.chip_class <= VI;
/* Vega10/Raven need a special workaround for a hardware bug. */
device->has_scissor_bug = device->rad_info.family == CHIP_VEGA10 ||
device->rad_info.family == CHIP_RAVEN;
radv_physical_device_init_mem_types(device); radv_physical_device_init_mem_types(device);
result = radv_init_wsi(device); result = radv_init_wsi(device);

View File

@@ -273,6 +273,7 @@ struct radv_physical_device {
bool rbplus_allowed; /* if RB+ is allowed */ bool rbplus_allowed; /* if RB+ is allowed */
bool has_clear_state; bool has_clear_state;
bool cpdma_prefetch_writes_memory; bool cpdma_prefetch_writes_memory;
bool has_scissor_bug;
/* This is the drivers on-disk cache used as a fallback as opposed to /* This is the drivers on-disk cache used as a fallback as opposed to
* the pipeline cache defined by apps. * the pipeline cache defined by apps.