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gallium/radeon: remove RADEON_FLAG_CPU_ACCESS

Browse Source 
https://lists.freedesktop.org/archives/amd-gfx/2017-June/010591.html

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák
2017-06-29 17:09:04 +02:00
parent 03c5ef195d
commit b09a22ad21
5 changed files with 6 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/gallium/drivers/radeon/r600_buffer_common.c
View File

@@ -132,7 +132,6 @@ void r600_init_resource_fields(struct r600_common_screen *rscreen,
res->flags |= RADEON_FLAG_GTT_WC;
break;
}
res->flags |= RADEON_FLAG_CPU_ACCESS;
/* fall through */
case PIPE_USAGE_DEFAULT:
case PIPE_USAGE_IMMUTABLE:
@@ -158,15 +157,12 @@ void r600_init_resource_fields(struct r600_common_screen *rscreen,
if (rscreen->info.drm_major == 2 &&
rscreen->info.drm_minor < 40)
res->domains = RADEON_DOMAIN_GTT;
else if (res->domains & RADEON_DOMAIN_VRAM)
res->flags |= RADEON_FLAG_CPU_ACCESS;
}
/* Tiled textures are unmappable. Always put them in VRAM. */
if ((res->b.b.target != PIPE_BUFFER && !rtex->surface.is_linear) ||
res->flags & R600_RESOURCE_FLAG_UNMAPPABLE) {
res->domains = RADEON_DOMAIN_VRAM;
res->flags &= ~RADEON_FLAG_CPU_ACCESS;
res->flags |= RADEON_FLAG_NO_CPU_ACCESS |
RADEON_FLAG_GTT_WC;
}

7
src/gallium/drivers/radeon/radeon_winsys.h
View File

@@ -51,10 +51,9 @@ enum radeon_bo_domain { /* bitfield */
enum radeon_bo_flag { /* bitfield */
RADEON_FLAG_GTT_WC = (1 << 0),
RADEON_FLAG_CPU_ACCESS = (1 << 1),
RADEON_FLAG_NO_CPU_ACCESS = (1 << 2),
RADEON_FLAG_NO_SUBALLOC = (1 << 3),
RADEON_FLAG_SPARSE = (1 << 4),
RADEON_FLAG_NO_CPU_ACCESS = (1 << 1),
RADEON_FLAG_NO_SUBALLOC = (1 << 2),
RADEON_FLAG_SPARSE = (1 << 3),
};
enum radeon_bo_usage { /* bitfield */

9
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
View File

@@ -398,8 +398,6 @@ static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws,
if (initial_domain & RADEON_DOMAIN_GTT)
request.preferred_heap |= AMDGPU_GEM_DOMAIN_GTT;
if (flags & RADEON_FLAG_CPU_ACCESS)
request.flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
if (flags & RADEON_FLAG_NO_CPU_ACCESS)
request.flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
if (flags & RADEON_FLAG_GTT_WC)
@@ -506,8 +504,6 @@ struct pb_slab *amdgpu_bo_slab_alloc(void *priv, unsigned heap,
if (heap & 1)
flags |= RADEON_FLAG_GTT_WC;
if (heap & 2)
flags |= RADEON_FLAG_CPU_ACCESS;
switch (heap >> 2) {
case 0:
@@ -1164,9 +1160,7 @@ amdgpu_bo_create(struct radeon_winsys *rws,
if (flags & RADEON_FLAG_GTT_WC)
heap |= 1;
if (flags & RADEON_FLAG_CPU_ACCESS)
heap |= 2;
if (flags & ~(RADEON_FLAG_GTT_WC | RADEON_FLAG_CPU_ACCESS))
if (flags & ~RADEON_FLAG_GTT_WC)
goto no_slab;
switch (domain) {
@@ -1204,7 +1198,6 @@ no_slab:
if (flags & RADEON_FLAG_SPARSE) {
assert(RADEON_SPARSE_PAGE_SIZE % alignment == 0);
assert(!(flags & RADEON_FLAG_CPU_ACCESS));
flags |= RADEON_FLAG_NO_CPU_ACCESS;

3
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
View File

@@ -581,8 +581,7 @@ static bool amdgpu_ib_new_buffer(struct amdgpu_winsys *ws, struct amdgpu_ib *ib)
pb = ws->base.buffer_create(&ws->base, buffer_size,
ws->info.gart_page_size,
RADEON_DOMAIN_GTT,
RADEON_FLAG_CPU_ACCESS);
RADEON_DOMAIN_GTT, 0);
if (!pb)
return false;

8
src/gallium/winsys/radeon/drm/radeon_drm_bo.c
View File

@@ -611,8 +611,6 @@ static struct radeon_bo *radeon_create_bo(struct radeon_drm_winsys *rws,
if (flags & RADEON_FLAG_GTT_WC)
args.flags |= RADEON_GEM_GTT_WC;
if (flags & RADEON_FLAG_CPU_ACCESS)
args.flags |= RADEON_GEM_CPU_ACCESS;
if (flags & RADEON_FLAG_NO_CPU_ACCESS)
args.flags |= RADEON_GEM_NO_CPU_ACCESS;
@@ -740,8 +738,6 @@ struct pb_slab *radeon_bo_slab_alloc(void *priv, unsigned heap,
if (heap & 1)
flags |= RADEON_FLAG_GTT_WC;
if (heap & 2)
flags |= RADEON_FLAG_CPU_ACCESS;
switch (heap >> 2) {
case 0:
@@ -952,9 +948,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
if (flags & RADEON_FLAG_GTT_WC)
heap |= 1;
if (flags & RADEON_FLAG_CPU_ACCESS)
heap |= 2;
if (flags & ~(RADEON_FLAG_GTT_WC | RADEON_FLAG_CPU_ACCESS))
if (flags & ~RADEON_FLAG_GTT_WC)
goto no_slab;
switch (domain) {