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intel/disasm: Change visibility of has_uip and has_jip

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Pre-work for shader disassembly label support.

From: "Lonnberg, Toni" <toni.lonnberg@intel.com>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4245>
This commit is contained in:
Danylo Piliaiev
2019-06-03 11:58:58 +03:00
committed by Marge Bot
parent e94c22429b
commit afa39d07e4
2 changed files with 8 additions and 6 deletions
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12
src/intel/compiler/brw_disasm.c
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@@ -32,8 +32,8 @@
#include "brw_eu.h"
#include "util/half_float.h"
static bool
has_jip(const struct gen_device_info *devinfo, enum opcode opcode)
bool
brw_has_jip(const struct gen_device_info *devinfo, enum opcode opcode)
{
if (devinfo->gen < 6)
return false;
@@ -47,8 +47,8 @@ has_jip(const struct gen_device_info *devinfo, enum opcode opcode)
opcode == BRW_OPCODE_HALT;
}
static bool
has_uip(const struct gen_device_info *devinfo, enum opcode opcode)
bool
brw_has_uip(const struct gen_device_info *devinfo, enum opcode opcode)
{
if (devinfo->gen < 6)
return false;
@@ -1733,13 +1733,13 @@ brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
if (opcode == BRW_OPCODE_SEND && devinfo->gen < 6)
format(file, " %"PRIu64, brw_inst_base_mrf(devinfo, inst));
if (has_uip(devinfo, opcode)) {
if (brw_has_uip(devinfo, opcode)) {
/* Instructions that have UIP also have JIP. */
pad(file, 16);
format(file, "JIP: %d", brw_inst_jip(devinfo, inst));
pad(file, 32);
format(file, "UIP: %d", brw_inst_uip(devinfo, inst));
} else if (has_jip(devinfo, opcode)) {
} else if (brw_has_jip(devinfo, opcode)) {
pad(file, 16);
if (devinfo->gen >= 7) {
format(file, "JIP: %d", brw_inst_jip(devinfo, inst));