iris: Define initial HIZ_CCS state and transitions
Make it match those of HIZ. Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
@@ -240,7 +240,7 @@ iris_blorp_surf_for_resource(struct iris_vtable *vtbl,
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assert(!iris_resource_unfinished_aux_import(res));
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assert(!iris_resource_unfinished_aux_import(res));
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if (aux_usage == ISL_AUX_USAGE_HIZ &&
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if (isl_aux_usage_has_hiz(aux_usage) &&
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!iris_resource_level_has_hiz(res, level))
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!iris_resource_level_has_hiz(res, level))
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aux_usage = ISL_AUX_USAGE_NONE;
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aux_usage = ISL_AUX_USAGE_NONE;
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@@ -663,13 +663,13 @@ iris_hiz_exec(struct iris_context *ice,
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iris_emit_pipe_control_flush(batch, "hiz op: pre-flushes (2/2)",
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iris_emit_pipe_control_flush(batch, "hiz op: pre-flushes (2/2)",
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PIPE_CONTROL_DEPTH_STALL);
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PIPE_CONTROL_DEPTH_STALL);
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assert(res->aux.usage == ISL_AUX_USAGE_HIZ && res->aux.bo);
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assert(isl_aux_usage_has_hiz(res->aux.usage) && res->aux.bo);
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iris_batch_maybe_flush(batch, 1500);
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iris_batch_maybe_flush(batch, 1500);
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struct blorp_surf surf;
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struct blorp_surf surf;
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iris_blorp_surf_for_resource(&ice->vtbl, &surf, &res->base,
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iris_blorp_surf_for_resource(&ice->vtbl, &surf, &res->base,
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ISL_AUX_USAGE_HIZ, level, true);
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res->aux.usage, level, true);
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struct blorp_batch blorp_batch;
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struct blorp_batch blorp_batch;
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enum blorp_batch_flags flags = 0;
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enum blorp_batch_flags flags = 0;
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@@ -1038,18 +1038,21 @@ iris_resource_prepare_hiz_access(struct iris_context *ice,
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enum isl_aux_usage aux_usage,
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enum isl_aux_usage aux_usage,
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bool fast_clear_supported)
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bool fast_clear_supported)
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{
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{
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assert(aux_usage == ISL_AUX_USAGE_NONE || aux_usage == ISL_AUX_USAGE_HIZ);
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assert(aux_usage == ISL_AUX_USAGE_NONE ||
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aux_usage == ISL_AUX_USAGE_HIZ ||
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aux_usage == ISL_AUX_USAGE_HIZ_CCS ||
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aux_usage == ISL_AUX_USAGE_CCS_E);
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enum isl_aux_op hiz_op = ISL_AUX_OP_NONE;
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enum isl_aux_op hiz_op = ISL_AUX_OP_NONE;
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switch (iris_resource_get_aux_state(res, level, layer)) {
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switch (iris_resource_get_aux_state(res, level, layer)) {
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case ISL_AUX_STATE_CLEAR:
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case ISL_AUX_STATE_CLEAR:
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case ISL_AUX_STATE_COMPRESSED_CLEAR:
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case ISL_AUX_STATE_COMPRESSED_CLEAR:
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if (aux_usage != ISL_AUX_USAGE_HIZ || !fast_clear_supported)
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if (aux_usage == ISL_AUX_USAGE_NONE || !fast_clear_supported)
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hiz_op = ISL_AUX_OP_FULL_RESOLVE;
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hiz_op = ISL_AUX_OP_FULL_RESOLVE;
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break;
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break;
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case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
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case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
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if (aux_usage != ISL_AUX_USAGE_HIZ)
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if (aux_usage == ISL_AUX_USAGE_NONE)
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hiz_op = ISL_AUX_OP_FULL_RESOLVE;
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hiz_op = ISL_AUX_OP_FULL_RESOLVE;
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break;
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break;
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@@ -1058,7 +1061,7 @@ iris_resource_prepare_hiz_access(struct iris_context *ice,
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break;
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break;
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case ISL_AUX_STATE_AUX_INVALID:
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case ISL_AUX_STATE_AUX_INVALID:
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if (aux_usage == ISL_AUX_USAGE_HIZ)
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if (aux_usage != ISL_AUX_USAGE_NONE)
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hiz_op = ISL_AUX_OP_AMBIGUATE;
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hiz_op = ISL_AUX_OP_AMBIGUATE;
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break;
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break;
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@@ -1093,22 +1096,23 @@ iris_resource_finish_hiz_write(struct iris_context *ice,
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uint32_t level, uint32_t layer,
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uint32_t level, uint32_t layer,
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enum isl_aux_usage aux_usage)
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enum isl_aux_usage aux_usage)
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{
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{
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assert(aux_usage == ISL_AUX_USAGE_NONE || aux_usage == ISL_AUX_USAGE_HIZ);
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assert(aux_usage == ISL_AUX_USAGE_NONE ||
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isl_aux_usage_has_hiz(aux_usage));
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switch (iris_resource_get_aux_state(res, level, layer)) {
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switch (iris_resource_get_aux_state(res, level, layer)) {
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case ISL_AUX_STATE_CLEAR:
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case ISL_AUX_STATE_CLEAR:
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assert(aux_usage == ISL_AUX_USAGE_HIZ);
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assert(isl_aux_usage_has_hiz(aux_usage));
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iris_resource_set_aux_state(ice, res, level, layer, 1,
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iris_resource_set_aux_state(ice, res, level, layer, 1,
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ISL_AUX_STATE_COMPRESSED_CLEAR);
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ISL_AUX_STATE_COMPRESSED_CLEAR);
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break;
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break;
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case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
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case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
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case ISL_AUX_STATE_COMPRESSED_CLEAR:
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case ISL_AUX_STATE_COMPRESSED_CLEAR:
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assert(aux_usage == ISL_AUX_USAGE_HIZ);
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assert(isl_aux_usage_has_hiz(aux_usage));
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break; /* Nothing to do */
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break; /* Nothing to do */
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case ISL_AUX_STATE_RESOLVED:
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case ISL_AUX_STATE_RESOLVED:
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if (aux_usage == ISL_AUX_USAGE_HIZ) {
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if (isl_aux_usage_has_hiz(aux_usage)) {
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iris_resource_set_aux_state(ice, res, level, layer, 1,
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iris_resource_set_aux_state(ice, res, level, layer, 1,
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ISL_AUX_STATE_COMPRESSED_NO_CLEAR);
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ISL_AUX_STATE_COMPRESSED_NO_CLEAR);
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} else {
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} else {
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@@ -1118,14 +1122,14 @@ iris_resource_finish_hiz_write(struct iris_context *ice,
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break;
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break;
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case ISL_AUX_STATE_PASS_THROUGH:
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case ISL_AUX_STATE_PASS_THROUGH:
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if (aux_usage == ISL_AUX_USAGE_HIZ) {
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if (isl_aux_usage_has_hiz(aux_usage)) {
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iris_resource_set_aux_state(ice, res, level, layer, 1,
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iris_resource_set_aux_state(ice, res, level, layer, 1,
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ISL_AUX_STATE_COMPRESSED_NO_CLEAR);
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ISL_AUX_STATE_COMPRESSED_NO_CLEAR);
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}
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}
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break;
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break;
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case ISL_AUX_STATE_AUX_INVALID:
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case ISL_AUX_STATE_AUX_INVALID:
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assert(aux_usage != ISL_AUX_USAGE_HIZ);
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assert(!isl_aux_usage_has_hiz(aux_usage));
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break;
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break;
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case ISL_AUX_STATE_PARTIAL_CLEAR:
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case ISL_AUX_STATE_PARTIAL_CLEAR:
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@@ -1174,6 +1178,7 @@ iris_resource_prepare_access(struct iris_context *ice,
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break;
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break;
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case ISL_AUX_USAGE_HIZ:
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case ISL_AUX_USAGE_HIZ:
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case ISL_AUX_USAGE_HIZ_CCS:
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for (uint32_t l = 0; l < num_levels; l++) {
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for (uint32_t l = 0; l < num_levels; l++) {
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const uint32_t level = start_level + l;
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const uint32_t level = start_level + l;
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if (!iris_resource_level_has_hiz(res, level))
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if (!iris_resource_level_has_hiz(res, level))
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@@ -1222,6 +1227,7 @@ iris_resource_finish_write(struct iris_context *ice,
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break;
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break;
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case ISL_AUX_USAGE_HIZ:
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case ISL_AUX_USAGE_HIZ:
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case ISL_AUX_USAGE_HIZ_CCS:
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if (!iris_resource_level_has_hiz(res, level))
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if (!iris_resource_level_has_hiz(res, level))
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return;
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return;
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@@ -507,6 +507,7 @@ iris_resource_configure_aux(struct iris_screen *screen,
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/* Having no aux buffer is only okay if there's no modifier with aux. */
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/* Having no aux buffer is only okay if there's no modifier with aux. */
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return !res->mod_info || res->mod_info->aux_usage == ISL_AUX_USAGE_NONE;
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return !res->mod_info || res->mod_info->aux_usage == ISL_AUX_USAGE_NONE;
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case ISL_AUX_USAGE_HIZ:
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case ISL_AUX_USAGE_HIZ:
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case ISL_AUX_USAGE_HIZ_CCS:
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initial_state = ISL_AUX_STATE_AUX_INVALID;
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initial_state = ISL_AUX_STATE_AUX_INVALID;
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break;
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break;
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case ISL_AUX_USAGE_MCS:
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case ISL_AUX_USAGE_MCS:
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