From ae9331694ba25dd87b7726d03bbd6d02b1ad5b30 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 24 May 2024 07:38:24 -0400 Subject: [PATCH] radeonsi: lower NIR resource srcs to descriptors last Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_shader.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index fb701f81095..35994c18398 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -2353,8 +2353,6 @@ struct nir_shader *si_get_nir_shader(struct si_shader *shader, NIR_PASS(progress, nir, nir_lower_non_uniform_access, &options); } - NIR_PASS(progress, nir, si_nir_lower_resource, shader, args); - bool is_last_vgt_stage = (sel->stage == MESA_SHADER_VERTEX || sel->stage == MESA_SHADER_TESS_EVAL || @@ -2519,6 +2517,8 @@ struct nir_shader *si_get_nir_shader(struct si_shader *shader, }); NIR_PASS(progress, nir, nir_opt_shrink_stores, false); NIR_PASS(progress, nir, ac_nir_lower_global_access); + /* This must be after vectorization because it causes bindings_different_restrict() to fail. */ + NIR_PASS(progress, nir, si_nir_lower_resource, shader, args); if (progress) { si_nir_opts(sel->screen, nir, false);